Searched refs:CLK_TOP_MSDC30_1_SEL (Results 1 – 15 of 15) sorted by relevance
| /Linux-v5.4/include/dt-bindings/clock/ |
| D | mt8135-clk.h | 81 #define CLK_TOP_MSDC30_1_SEL 70 macro
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| D | mt7629-clk.h | 96 #define CLK_TOP_MSDC30_1_SEL 86 macro
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| D | mt7622-clk.h | 81 #define CLK_TOP_MSDC30_1_SEL 69 macro
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| D | mt8173-clk.h | 107 #define CLK_TOP_MSDC30_1_SEL 97 macro
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| D | mt2712-clk.h | 144 #define CLK_TOP_MSDC30_1_SEL 113 macro
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| D | mt2701-clk.h | 102 #define CLK_TOP_MSDC30_1_SEL 91 macro
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| /Linux-v5.4/drivers/clk/mediatek/ |
| D | clk-mt8135.c | 364 MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_parents, 0x0148, 0, 3, 7),
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| D | clk-mt7629.c | 516 MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_1_parents,
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| D | clk-mt7622.c | 547 MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_0_parents,
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| D | clk-mt2701.c | 515 MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_parents,
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| D | clk-mt2712.c | 769 MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel",
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| D | clk-mt8173.c | 560 MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_1_parents, 0x0070, 24, 3, 31),
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| /Linux-v5.4/arch/arm64/boot/dts/mediatek/ |
| D | mt7622-rfb1.dts | 165 assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
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| D | mt7622-bananapi-bpi-r64.dts | 189 assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
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| /Linux-v5.4/arch/arm/boot/dts/ |
| D | mt7623.dtsi | 722 <&topckgen CLK_TOP_MSDC30_1_SEL>;
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