Searched refs:CLK_TOP_MFG_SEL (Results 1 – 11 of 11) sorted by relevance
/Linux-v5.4/include/dt-bindings/clock/ |
D | mt8135-clk.h | 75 #define CLK_TOP_MFG_SEL 64 macro
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D | mt8173-clk.h | 99 #define CLK_TOP_MFG_SEL 89 macro
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D | mt2712-clk.h | 136 #define CLK_TOP_MFG_SEL 105 macro
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D | mt2701-clk.h | 92 #define CLK_TOP_MFG_SEL 81 macro
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/Linux-v5.4/drivers/clk/mediatek/ |
D | clk-mt8135.c | 355 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents, 0x0140, 16, 4, 23),
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D | clk-mt2701.c | 501 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents,
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D | clk-mt2712.c | 751 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel",
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D | clk-mt8173.c | 550 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents, 0x0050, 24, 4, 31),
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/Linux-v5.4/arch/arm/boot/dts/ |
D | mt2701.dtsi | 157 <&topckgen CLK_TOP_MFG_SEL>,
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D | mt7623.dtsi | 279 <&topckgen CLK_TOP_MFG_SEL>,
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/Linux-v5.4/arch/arm64/boot/dts/mediatek/ |
D | mt2712e.dtsi | 286 <&topckgen CLK_TOP_MFG_SEL>,
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