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Searched refs:CLK_TOP_MFG_SEL (Results 1 – 11 of 11) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dmt8135-clk.h75 #define CLK_TOP_MFG_SEL 64 macro
Dmt8173-clk.h99 #define CLK_TOP_MFG_SEL 89 macro
Dmt2712-clk.h136 #define CLK_TOP_MFG_SEL 105 macro
Dmt2701-clk.h92 #define CLK_TOP_MFG_SEL 81 macro
/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt8135.c355 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents, 0x0140, 16, 4, 23),
Dclk-mt2701.c501 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents,
Dclk-mt2712.c751 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel",
Dclk-mt8173.c550 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents, 0x0050, 24, 4, 31),
/Linux-v5.4/arch/arm/boot/dts/
Dmt2701.dtsi157 <&topckgen CLK_TOP_MFG_SEL>,
Dmt7623.dtsi279 <&topckgen CLK_TOP_MFG_SEL>,
/Linux-v5.4/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi286 <&topckgen CLK_TOP_MFG_SEL>,