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Searched refs:CLK_TOP_F_MP0_PLL1 (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dmt2712-clk.h68 #define CLK_TOP_F_MP0_PLL1 37 macro
/Linux-v5.4/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi90 <&topckgen CLK_TOP_F_MP0_PLL1>;
103 <&topckgen CLK_TOP_F_MP0_PLL1>;
/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt2712.c120 FACTOR(CLK_TOP_F_MP0_PLL1, "f_mp0_pll1_ck", "univpll_d2", 1,