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Searched refs:CLK_TOP_CCI400_SEL (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.4/Documentation/devicetree/bindings/media/
Dmediatek-vcodec.txt55 <&topckgen CLK_TOP_CCI400_SEL>,
70 <&topckgen CLK_TOP_CCI400_SEL>,
/Linux-v5.4/include/dt-bindings/clock/
Dmt8173-clk.h118 #define CLK_TOP_CCI400_SEL 108 macro
Dmt2712-clk.h155 #define CLK_TOP_CCI400_SEL 124 macro
/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt8173.c578 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents, 0x00a0, 16, 3, 23),
920 clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_CCI400_SEL]); in mtk_clk_enable_critical()
Dclk-mt2712.c794 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel",
/Linux-v5.4/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi1310 <&topckgen CLK_TOP_CCI400_SEL>,
1325 <&topckgen CLK_TOP_CCI400_SEL>,