Searched refs:CLK_TOP_AUD_INTBUS_SEL (Results 1 – 13 of 13) sorted by relevance
| /Linux-v5.4/include/dt-bindings/clock/ |
| D | mt8135-clk.h | 78 #define CLK_TOP_AUD_INTBUS_SEL 67 macro
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| D | mt7629-clk.h | 100 #define CLK_TOP_AUD_INTBUS_SEL 90 macro
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| D | mt8516-clk.h | 168 #define CLK_TOP_AUD_INTBUS_SEL 136 macro
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| D | mt7622-clk.h | 85 #define CLK_TOP_AUD_INTBUS_SEL 73 macro
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| D | mt8173-clk.h | 111 #define CLK_TOP_AUD_INTBUS_SEL 101 macro
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| D | mt2712-clk.h | 148 #define CLK_TOP_AUD_INTBUS_SEL 117 macro
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| /Linux-v5.4/drivers/clk/mediatek/ |
| D | clk-mt8135.c | 359 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
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| D | clk-mt7629.c | 525 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
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| D | clk-mt8516.c | 377 MUX(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
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| D | clk-mt7622.c | 557 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
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| D | clk-mt2712.c | 778 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel",
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| D | clk-mt8173.c | 565 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents, 0x0080, 24, 3, 31),
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| /Linux-v5.4/arch/arm64/boot/dts/mediatek/ |
| D | mt8173.dtsi | 780 <&topckgen CLK_TOP_AUD_INTBUS_SEL>,
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