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Searched refs:CLK_TOP_APLL12_DIV1 (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.4/sound/soc/mediatek/mt8183/
Dmt8183-afe-clk.c45 CLK_TOP_APLL12_DIV1, enumerator
84 [CLK_TOP_APLL12_DIV1] = "top_apll12_div1",
518 .div_clk_id = CLK_TOP_APLL12_DIV1,
/Linux-v5.4/include/dt-bindings/clock/
Dmt8516-clk.h152 #define CLK_TOP_APLL12_DIV1 120 macro
Dmt8183-clk.h159 #define CLK_TOP_APLL12_DIV1 123 macro
Dmt6779-clk.h139 #define CLK_TOP_APLL12_DIV1 129 macro
/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt8516.c667 GATE_TOP5(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll12_ck_div1", 1),
Dclk-mt6779.c829 DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "i2s1_m_ck_sel",
Dclk-mt8183.c738 DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll_i2s1_sel",