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Searched refs:CLK_MM_MDP_RSZ1 (Results 1 – 14 of 14) sorted by relevance

/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt8183-mm.c51 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 15),
Dclk-mt2701-mm.c58 GATE_DISP0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 12),
Dclk-mt6779-mm.c50 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 15),
Dclk-mt6797-mm.c52 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 7),
Dclk-mt2712-mm.c68 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 6),
Dclk-mt8173.c794 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 6),
/Linux-v5.4/include/dt-bindings/clock/
Dmt6797-clk.h222 #define CLK_MM_MDP_RSZ1 8 macro
Dmt8173-clk.h255 #define CLK_MM_MDP_RSZ1 7 macro
Dmt2712-clk.h307 #define CLK_MM_MDP_RSZ1 6 macro
Dmt8183-clk.h324 #define CLK_MM_MDP_RSZ1 15 macro
Dmt6779-clk.h356 #define CLK_MM_MDP_RSZ1 16 macro
Dmt2701-clk.h365 #define CLK_MM_MDP_RSZ1 13 macro
/Linux-v5.4/Documentation/devicetree/bindings/media/
Dmediatek-mdp.txt67 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
/Linux-v5.4/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi948 clocks = <&mmsys CLK_MM_MDP_RSZ1>;