Searched refs:CLK_MM_MDP_RSZ0 (Results 1 – 14 of 14) sorted by relevance
/Linux-v5.4/drivers/clk/mediatek/ |
D | clk-mt8183-mm.c | 50 GATE_MM0(CLK_MM_MDP_RSZ0, "mm_mdp_rsz0", "mm_sel", 14),
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D | clk-mt2701-mm.c | 59 GATE_DISP0(CLK_MM_MDP_RSZ0, "mm_mdp_rsz0", "mm_sel", 13),
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D | clk-mt6779-mm.c | 49 GATE_MM0(CLK_MM_MDP_RSZ0, "mm_mdp_rsz0", "mm_sel", 14),
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D | clk-mt6797-mm.c | 51 GATE_MM0(CLK_MM_MDP_RSZ0, "mm_mdp_rsz0", "mm_sel", 6),
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D | clk-mt2712-mm.c | 67 GATE_MM0(CLK_MM_MDP_RSZ0, "mm_mdp_rsz0", "mm_sel", 5),
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D | clk-mt8173.c | 793 GATE_MM0(CLK_MM_MDP_RSZ0, "mm_mdp_rsz0", "mm_sel", 5),
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/Linux-v5.4/include/dt-bindings/clock/ |
D | mt6797-clk.h | 221 #define CLK_MM_MDP_RSZ0 7 macro
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D | mt8173-clk.h | 254 #define CLK_MM_MDP_RSZ0 6 macro
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D | mt2712-clk.h | 306 #define CLK_MM_MDP_RSZ0 5 macro
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D | mt8183-clk.h | 323 #define CLK_MM_MDP_RSZ0 14 macro
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D | mt6779-clk.h | 355 #define CLK_MM_MDP_RSZ0 15 macro
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D | mt2701-clk.h | 366 #define CLK_MM_MDP_RSZ0 14 macro
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/Linux-v5.4/Documentation/devicetree/bindings/media/ |
D | mediatek-mdp.txt | 60 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
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/Linux-v5.4/arch/arm64/boot/dts/mediatek/ |
D | mt8173.dtsi | 941 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
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