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Searched refs:CLK_MM_DSI0_ENGINE (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt2712-mm.c97 GATE_MM1(CLK_MM_DSI0_ENGINE, "mm_dsi0_engine", "mm_sel", 4),
Dclk-mt8173.c824 GATE_MM1(CLK_MM_DSI0_ENGINE, "mm_dsi0_engine", "mm_sel", 4),
/Linux-v5.4/include/dt-bindings/clock/
Dmt8173-clk.h284 #define CLK_MM_DSI0_ENGINE 36 macro
Dmt2712-clk.h335 #define CLK_MM_DSI0_ENGINE 34 macro
/Linux-v5.4/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi1122 clocks = <&mmsys CLK_MM_DSI0_ENGINE>,