Searched refs:CLK_MM_DISP_RDMA0 (Results 1 – 12 of 12) sorted by relevance
/Linux-v5.4/drivers/clk/mediatek/ |
D | clk-mt8183-mm.c | 59 GATE_MM0(CLK_MM_DISP_RDMA0, "mm_disp_rdma0", "mm_sel", 23),
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D | clk-mt6779-mm.c | 58 GATE_MM0(CLK_MM_DISP_RDMA0, "mm_disp_rdma0", "mm_sel", 23),
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D | clk-mt6797-mm.c | 64 GATE_MM0(CLK_MM_DISP_RDMA0, "mm_disp_rdma0", "mm_sel", 19),
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D | clk-mt2712-mm.c | 80 GATE_MM0(CLK_MM_DISP_RDMA0, "mm_disp_rdma0", "mm_sel", 18),
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D | clk-mt8173.c | 805 GATE_MM0(CLK_MM_DISP_RDMA0, "mm_disp_rdma0", "mm_sel", 18),
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/Linux-v5.4/include/dt-bindings/clock/ |
D | mt6797-clk.h | 234 #define CLK_MM_DISP_RDMA0 20 macro
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D | mt8173-clk.h | 266 #define CLK_MM_DISP_RDMA0 18 macro
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D | mt2712-clk.h | 319 #define CLK_MM_DISP_RDMA0 18 macro
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D | mt8183-clk.h | 331 #define CLK_MM_DISP_RDMA0 22 macro
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D | mt6779-clk.h | 363 #define CLK_MM_DISP_RDMA0 23 macro
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/Linux-v5.4/Documentation/devicetree/bindings/display/mediatek/ |
D | mediatek,disp.txt | 99 clocks = <&mmsys CLK_MM_DISP_RDMA0>;
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/Linux-v5.4/arch/arm64/boot/dts/mediatek/ |
D | mt8173.dtsi | 1011 clocks = <&mmsys CLK_MM_DISP_RDMA0>;
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