Searched refs:CLK_MM_DISP_OVL0 (Results 1 – 12 of 12) sorted by relevance
/Linux-v5.4/drivers/clk/mediatek/ |
D | clk-mt8183-mm.c | 56 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 20),
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D | clk-mt6779-mm.c | 55 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 20),
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D | clk-mt6797-mm.c | 60 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 15),
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D | clk-mt2712-mm.c | 78 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 16),
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D | clk-mt8173.c | 803 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 16),
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/Linux-v5.4/include/dt-bindings/clock/ |
D | mt6797-clk.h | 230 #define CLK_MM_DISP_OVL0 16 macro
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D | mt8173-clk.h | 264 #define CLK_MM_DISP_OVL0 16 macro
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D | mt2712-clk.h | 317 #define CLK_MM_DISP_OVL0 16 macro
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D | mt8183-clk.h | 328 #define CLK_MM_DISP_OVL0 19 macro
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D | mt6779-clk.h | 360 #define CLK_MM_DISP_OVL0 20 macro
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/Linux-v5.4/Documentation/devicetree/bindings/display/mediatek/ |
D | mediatek,disp.txt | 79 clocks = <&mmsys CLK_MM_DISP_OVL0>;
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/Linux-v5.4/arch/arm64/boot/dts/mediatek/ |
D | mt8173.dtsi | 991 clocks = <&mmsys CLK_MM_DISP_OVL0>;
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