Searched refs:CLK_DIV_8 (Results 1 – 4 of 4) sorted by relevance
309 #define CLK_DIV_8 0x03 macro
465 #define CLK_DIV_8 0x04 macro
54 #define CLK_DIV_8 0x04 macro
782 while ((n < MIN_DIV_N_PCR) && (div < CLK_DIV_8)) { in rtsx_pci_switch_clock()