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Searched refs:CLK_APMIXED_TVDPLL (Results 1 – 16 of 16) sorted by relevance

/Linux-v5.4/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,dpi.txt27 <&apmixedsys CLK_APMIXED_TVDPLL>;
/Linux-v5.4/include/dt-bindings/clock/
Dmt8135-clk.h114 #define CLK_APMIXED_TVDPLL 7 macro
Dmt6797-clk.h113 #define CLK_APMIXED_TVDPLL 6 macro
Dmt8173-clk.h163 #define CLK_APMIXED_TVDPLL 8 macro
Dmt2712-clk.h22 #define CLK_APMIXED_TVDPLL 10 macro
Dmt8183-clk.h19 #define CLK_APMIXED_TVDPLL 8 macro
Dmt6779-clk.h176 #define CLK_APMIXED_TVDPLL 11 macro
Dmt2701-clk.h180 #define CLK_APMIXED_TVDPLL 6 macro
/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt8135.c620 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x294, 0x2ac, 0x80000001, 0, 31, 0x294, 6, 0x0, 0x298, 0),
Dclk-mt6797.c652 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x0270, 0x027C, 0xC0000121, 0, 21,
Dclk-mt2701.c947 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x250, 0x25c, 0x00000001, 0,
Dclk-mt6779.c1197 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x0270, 0x027C, BIT(0),
Dclk-mt8183.c1144 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x0260, 0x026C, 0x00000001,
Dclk-mt2712.c1245 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x0290, 0x029C, 0xc0000101,
Dclk-mt8173.c1069 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x270, 0x27c, 0x00000001, 0, 21, 0x270, 4, 0x0, 0x274, 0),
/Linux-v5.4/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi1152 <&apmixedsys CLK_APMIXED_TVDPLL>;