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Searched refs:CLK_APMIXED_MSDCPLL (Results 1 – 14 of 14) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dmt8135-clk.h113 #define CLK_APMIXED_MSDCPLL 6 macro
Dmt6797-clk.h111 #define CLK_APMIXED_MSDCPLL 4 macro
Dmt8173-clk.h161 #define CLK_APMIXED_MSDCPLL 6 macro
Dmt2712-clk.h20 #define CLK_APMIXED_MSDCPLL 8 macro
Dmt8183-clk.h16 #define CLK_APMIXED_MSDCPLL 5 macro
Dmt6779-clk.h172 #define CLK_APMIXED_MSDCPLL 7 macro
Dmt2701-clk.h179 #define CLK_APMIXED_MSDCPLL 5 macro
/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt8135.c619 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x278, 0x290, 0x80000001, 0, 21, 0x278, 6, 0x0, 0x27c, 0),
Dclk-mt6797.c648 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0250, 0x025C, 0x00000121, 0, 21,
Dclk-mt2701.c945 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x240, 0x24c, 0x00000001, 0,
Dclk-mt6779.c1195 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0260, 0x026C, BIT(0),
Dclk-mt8183.c1142 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0250, 0x025C, 0x00000001,
Dclk-mt2712.c1241 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0270, 0x027C, 0x00000101,
Dclk-mt8173.c1067 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x250, 0x25c, 0x00000001, 0, 21, 0x250, 4, 0x0, 0x254, 0),