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Searched refs:CLK_APMIXED_APLL1 (Results 1 – 12 of 12) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dmt8516-clk.h17 #define CLK_APMIXED_APLL1 4 macro
Dmt6797-clk.h116 #define CLK_APMIXED_APLL1 9 macro
Dmt8173-clk.h166 #define CLK_APMIXED_APLL1 11 macro
Dmt2712-clk.h16 #define CLK_APMIXED_APLL1 4 macro
Dmt8183-clk.h20 #define CLK_APMIXED_APLL1 9 macro
Dmt6779-clk.h177 #define CLK_APMIXED_APLL1 12 macro
/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt6797.c658 PLL(CLK_APMIXED_APLL1, "apll1", 0x02A0, 0x02B0, 0x00000131, 0, 31,
Dclk-mt8516.c781 PLL(CLK_APMIXED_APLL1, "apll1", 0x0180, 0x0190, 0x00000001, 0,
Dclk-mt6779.c1205 PLL(CLK_APMIXED_APLL1, "apll1", 0x02C0, 0x02D0, BIT(0),
Dclk-mt8183.c1149 PLL(CLK_APMIXED_APLL1, "apll1", 0x02A0, 0x02B0, 0x00000001,
Dclk-mt2712.c1233 PLL(CLK_APMIXED_APLL1, "apll1", 0x0330, 0x0340, 0x00000101,
Dclk-mt8173.c1072 PLL(CLK_APMIXED_APLL1, "apll1", 0x2a0, 0x2b0, 0x00000001, 0, 31, 0x2a0, 4, 0x2a4, 0x2a4, 0),