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Searched refs:CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/arch/powerpc/platforms/cell/spufs/
Dhw_ops.c75 CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR); in spu_hw_mbox_stat_poll()
117 spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR); in spu_hw_wbox_write()
Dbacking_ops.c108 CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR; in spu_backing_mbox_stat_poll()
163 CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR; in spu_backing_wbox_write()
/Linux-v5.4/arch/powerpc/include/asm/
Dspu.h513 #define CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR 0x10L macro