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Searched refs:CHL_INT1 (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/drivers/scsi/hisi_sas/
Dhisi_sas_v1_hw.c172 #define CHL_INT1 (PORT_BASE + 0x1b4) macro
1714 val = hisi_sas_phy_read32(hisi_hba, i, CHL_INT1); in interrupt_openall_v1_hw()
1715 hisi_sas_phy_write32(hisi_hba, i, CHL_INT1, val); in interrupt_openall_v1_hw()
Dhisi_sas_v3_hw.c259 #define CHL_INT1 (PORT_BASE + 0x1b8) macro
613 hisi_sas_phy_write32(hisi_hba, i, CHL_INT1, 0xffffffff); in init_reg_v3_hw()
1672 u32 irq_value = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT1); in handle_chl_int1_v3_hw()
1692 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT1, irq_value); in handle_chl_int1_v3_hw()
2759 HISI_SAS_DEBUGFS_REG(CHL_INT1),
Dhisi_sas_v2_hw.c234 #define CHL_INT1 (PORT_BASE + 0x1b8) macro
1247 hisi_sas_phy_write32(hisi_hba, i, CHL_INT1, 0xffffffff); in init_reg_v2_hw()
2877 CHL_INT1); in int_chnl_int_v2_hw()
2897 CHL_INT1, irq_value1); in int_chnl_int_v2_hw()