Home
last modified time | relevance | path

Searched refs:CGU_CLK_GATE (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.4/drivers/clk/ingenic/
Djz4780-cgu.c336 "vpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
380 "msc0", CGU_CLK_DIV | CGU_CLK_GATE,
387 "msc1", CGU_CLK_DIV | CGU_CLK_GATE,
394 "msc2", CGU_CLK_DIV | CGU_CLK_GATE,
401 "uhc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
438 "pcm", CGU_CLK_MUX | CGU_CLK_GATE,
445 "gpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
454 "hdmi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
463 "bch", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
474 "nemc", CGU_CLK_GATE,
[all …]
Djz4770-cgu.c162 "h1clk", CGU_CLK_DIV | CGU_CLK_GATE,
179 "c1clk", CGU_CLK_DIV | CGU_CLK_GATE,
199 "mmc0_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
206 "mmc1_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
213 "mmc2_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
220 "cim", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
227 "uhc", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
234 "gpu", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
241 "bch", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
248 "lpclk", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
[all …]
Djz4725b-cgu.c121 "ipu", CGU_CLK_DIV | CGU_CLK_GATE,
131 "lcd", CGU_CLK_DIV | CGU_CLK_GATE,
138 "i2s", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
146 "spi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
169 "uart", CGU_CLK_GATE,
175 "dma", CGU_CLK_GATE,
181 "adc", CGU_CLK_GATE,
187 "i2c", CGU_CLK_GATE,
193 "aic", CGU_CLK_GATE,
199 "mmc0", CGU_CLK_GATE,
[all …]
Djz4740-cgu.c136 "lcd", CGU_CLK_DIV | CGU_CLK_GATE,
152 "i2s", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
160 "spi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
168 "mmc", CGU_CLK_DIV | CGU_CLK_GATE,
175 "uhc", CGU_CLK_DIV | CGU_CLK_GATE,
182 "udc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
192 "uart0", CGU_CLK_GATE,
198 "uart1", CGU_CLK_GATE,
204 "dma", CGU_CLK_GATE,
210 "ipu", CGU_CLK_GATE,
[all …]
Dcgu.h148 CGU_CLK_GATE = BIT(2), enumerator
Dcgu.c530 if (clk_info->type & CGU_CLK_GATE) { in ingenic_clk_enable()
552 if (clk_info->type & CGU_CLK_GATE) { in ingenic_clk_disable()
570 if (clk_info->type & CGU_CLK_GATE) { in ingenic_clk_is_enabled()
700 caps &= ~(CGU_CLK_GATE | CGU_CLK_FIXDIV); in ingenic_register_clock()