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Searched refs:CCR2 (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/include/linux/
Domap-dma.h151 CPC, CCR2, LCH_CTRL, enumerator
/Linux-v5.4/drivers/char/pcmcia/
Dsynclink_cs.c270 #define CCR2 0x2e macro
2897 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f; in mgslpc_set_rate()
2899 write_reg(info, (unsigned char) (channel + CCR2), val); in mgslpc_set_rate()
2966 write_reg(info, CHB + CCR2, 0x38); in enable_auxclk()
2968 write_reg(info, CHB + CCR2, 0x30); in enable_auxclk()
3001 val = read_reg(info, CHA + CCR2) | (BIT4 | BIT5); in loopback_enable()
3002 write_reg(info, CHA + CCR2, val); in loopback_enable()
3135 write_reg(info, CHA + CCR2, val); in hdlc_mode()
3452 write_reg(info, CHA + CCR2, 0x10); in async_mode()
/Linux-v5.4/arch/arm/mach-omap1/
Ddma.c75 [CCR2] = { 0x0024, 0x40, OMAP_DMA_REG_16BIT },
/Linux-v5.4/arch/arm/plat-omap/
Ddma.c238 ccr = p->dma_read(CCR2, lch); in omap_set_dma_transfer_params()
242 p->dma_write(ccr, CCR2, lch); in omap_set_dma_transfer_params()
/Linux-v5.4/drivers/dma/ti/
Domap-dma.c554 omap_dma_chan_write(c, CCR2, d->ccr >> 16); in omap_dma_start_desc()