Searched refs:Bits (Results 1 – 25 of 64) sorted by relevance
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29 - Bits [3:0]33 - Bits [7:4]37 - Bits [3:0]41 - Bits [7:4]45 - Bits [3:0]49 - Bits [7:4]78 - Bits [3:0]82 - Bits [3:0]86 - Bits [3:0]90 - Bits [7:4][all …]
1 Maxim Integrated MAX2175 RF to Bits tuner5 RF to Bits® front-end designed for software-defined radio solutions.
29 Bits [6:5] - transaction length. b01 - 72B is supported,42 Bits [7:1] - the 7bit Address of the I2C device.
11 * Bits [15:8] are the Bus number.12 * Bits [7:3] are the Device number.13 * Bits [2:0] are the Function number.
43 Bits 0:15 Minor version44 Bits 16:31 Major version
8 as decoded from the fuse registers. Bits order/assignment
18 * Bits 0-54 page frame number (PFN) if present19 * Bits 0-4 swap type if swapped20 * Bits 5-54 swap offset if swapped24 * Bits 57-60 zero
26 Resolution: 8 Bits
20 Bits 0-3 of byte n refer to confidence value of depth pixel 2*n,
133 * - Bits 0-2135 * - Bits 3-5
11 - bits-per-pixel: Bits per pixel.
24 respectively. Bits 2-7 are ignored, so it's safe to write ASCII data.
40 represent the state of PIO_0/PIO_1. Bits 2..7 do not care. The PIO's are
14 - bits-per-pixel: Bits per pixel
82 01 Bit 8 is set if the effect is playing. Bits 0 to 7 are the effect id.111 Bits 4-7: Val 2 = effect along one axis. Byte 05 indicates direction115 Bits 0-3: Val 0 = No trigger
37 See Section 4.3.12.4 of ISA; Bits::
9 - bpp: Bits per pixel
49 Bits[5:0] pagetable bit number used to activate memory51 Bits[11:6] reduction in physical address space, in bits, when
1316 enum MT2063_Mask_Bits Bits) in MT2063_ClearPowerMaskBits() argument1321 Bits = (enum MT2063_Mask_Bits)(Bits & MT2063_ALL_SD); /* Only valid bits for this tuner */ in MT2063_ClearPowerMaskBits()1322 if ((Bits & 0xFF00) != 0) { in MT2063_ClearPowerMaskBits()1323 state->reg[MT2063_REG_PWR_2] &= ~(u8) (Bits >> 8); in MT2063_ClearPowerMaskBits()1329 if ((Bits & 0xFF) != 0) { in MT2063_ClearPowerMaskBits()1330 state->reg[MT2063_REG_PWR_1] &= ~(u8) (Bits & 0xFF); in MT2063_ClearPowerMaskBits()
139 Bits Field Description179 Bits Field Description440 Bits Field Description458 Bits Field Description468 Bits Field Description480 Bits Field Description492 Bits Field Description508 Bits Field Description558 Bits Field Description571 Bits Field Description[all …]
29 then AND the two values together. Bits that are 1 in the result of the AND
182 Bits 0-31 correspond to bits 0-31 in AT_HWCAP vector. Bits 32-63 correspond
138 Bits 0..6: fragment length (7 bits are used)139 Bits 10..13: encapsulated protocol140 Bits 16..19: management command (for IPC management protocol)
370 - Bits 1:2 alpha control371 - Bits 3:5 pixel format1362 - Bits 0:4 line number1364 - Bits 0:31 all set specifies "all lines"1580 - Bits 0:15 build1581 - Bits 16:23 minor1582 - Bits 24:31 major1647 u32 mask1; // Bits 0-2 are the type mask:2548 - Bits 0:15 build2549 - Bits 16:23 minor[all …]
