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Searched refs:BXT_P_CR_GT_DISP_PWRON (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_dpio_phy.c317 if (!(I915_READ(BXT_P_CR_GT_DISP_PWRON) & phy_info->pwron_mask)) in bxt_ddi_phy_is_enabled()
376 val = I915_READ(BXT_P_CR_GT_DISP_PWRON); in _bxt_ddi_phy_init()
378 I915_WRITE(BXT_P_CR_GT_DISP_PWRON, val); in _bxt_ddi_phy_init()
459 val = I915_READ(BXT_P_CR_GT_DISP_PWRON); in bxt_ddi_phy_uninit()
461 I915_WRITE(BXT_P_CR_GT_DISP_PWRON, val); in bxt_ddi_phy_uninit()
Dvlv_dsi.c775 val = I915_READ(BXT_P_CR_GT_DISP_PWRON); in intel_dsi_pre_enable()
776 I915_WRITE(BXT_P_CR_GT_DISP_PWRON, in intel_dsi_pre_enable()
922 val = I915_READ(BXT_P_CR_GT_DISP_PWRON); in intel_dsi_post_disable()
923 I915_WRITE(BXT_P_CR_GT_DISP_PWRON, in intel_dsi_post_disable()
/Linux-v5.4/drivers/gpu/drm/i915/gvt/
Dmmio.c249 vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) &= in intel_vgpu_reset_mmio()
Dhandlers.c3142 MMIO_DH(BXT_P_CR_GT_DISP_PWRON, D_BXT, NULL, bxt_gt_disp_pwron_write); in init_bxt_mmio_info()
/Linux-v5.4/drivers/gpu/drm/i915/
Di915_reg.h1635 #define BXT_P_CR_GT_DISP_PWRON _MMIO(0x138090) macro