Searched refs:B4_R1_CSR (Results 1 – 2 of 2) sorted by relevance
789 outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_P) ; in fddi_isr()794 outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_C) ; in fddi_isr()831 outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_F) ; in fddi_isr()838 outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_F) ; in fddi_isr()
168 #define B4_R1_CSR 0x021c /* 32 bit BMU Control/Status Register */ macro
