Home
last modified time | relevance | path

Searched refs:AZALIA_CRC1_CONTROL3__CRC_BLOCK_COMPLETE_PHASE__SHIFT (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_sh_mask.h12174 #define AZALIA_CRC1_CONTROL3__CRC_BLOCK_COMPLETE_PHASE__SHIFT 0x4 macro
Ddce_10_0_sh_mask.h13432 #define AZALIA_CRC1_CONTROL3__CRC_BLOCK_COMPLETE_PHASE__SHIFT 0x4 macro
Ddce_11_0_sh_mask.h13438 #define AZALIA_CRC1_CONTROL3__CRC_BLOCK_COMPLETE_PHASE__SHIFT 0x4 macro
Ddce_11_2_sh_mask.h14054 #define AZALIA_CRC1_CONTROL3__CRC_BLOCK_COMPLETE_PHASE__SHIFT 0x4 macro
Ddce_12_0_sh_mask.h7016 #define AZALIA_CRC1_CONTROL3__CRC_BLOCK_COMPLETE_PHASE__SHIFT … macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_sh_mask.h7556 #define AZALIA_CRC1_CONTROL3__CRC_BLOCK_COMPLETE_PHASE__SHIFT … macro
Ddcn_1_0_sh_mask.h8151 #define AZALIA_CRC1_CONTROL3__CRC_BLOCK_COMPLETE_PHASE__SHIFT … macro
Ddcn_2_0_0_sh_mask.h7824 #define AZALIA_CRC1_CONTROL3__CRC_BLOCK_COMPLETE_PHASE__SHIFT … macro