Searched refs:ATOM_PPLL_INVALID (Results 1 – 15 of 15) sorted by relevance
272 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) in amdgpu_pll_get_use_mask()300 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) in amdgpu_pll_get_shared_dp_ppll()304 return ATOM_PPLL_INVALID; in amdgpu_pll_get_shared_dp_ppll()327 return ATOM_PPLL_INVALID; in amdgpu_pll_get_shared_nondp_ppll()338 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) in amdgpu_pll_get_shared_nondp_ppll()346 (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID)) in amdgpu_pll_get_shared_nondp_ppll()350 return ATOM_PPLL_INVALID; in amdgpu_pll_get_shared_nondp_ppll()
173 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_virtual_crtc_disable()238 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_virtual_crtc_init()
2132 return ATOM_PPLL_INVALID; in dce_v8_0_pick_pll()2136 if (pll != ATOM_PPLL_INVALID) in dce_v8_0_pick_pll()2142 if (pll != ATOM_PPLL_INVALID) in dce_v8_0_pick_pll()2155 return ATOM_PPLL_INVALID; in dce_v8_0_pick_pll()2166 return ATOM_PPLL_INVALID; in dce_v8_0_pick_pll()2168 return ATOM_PPLL_INVALID; in dce_v8_0_pick_pll()2493 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v8_0_crtc_disable()2549 if ((amdgpu_crtc->pll_id == ATOM_PPLL_INVALID) && in dce_v8_0_crtc_mode_fixup()2602 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v8_0_crtc_init()
2304 return ATOM_PPLL_INVALID; in dce_v11_0_pick_pll()2311 return ATOM_PPLL_INVALID; in dce_v11_0_pick_pll()2315 if (pll != ATOM_PPLL_INVALID) in dce_v11_0_pick_pll()2321 if (pll != ATOM_PPLL_INVALID) in dce_v11_0_pick_pll()2333 return ATOM_PPLL_INVALID; in dce_v11_0_pick_pll()2342 return ATOM_PPLL_INVALID; in dce_v11_0_pick_pll()2344 return ATOM_PPLL_INVALID; in dce_v11_0_pick_pll()2674 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v11_0_crtc_disable()2749 if ((amdgpu_crtc->pll_id == ATOM_PPLL_INVALID) && in dce_v11_0_crtc_mode_fixup()2822 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v11_0_crtc_init()
2242 return ATOM_PPLL_INVALID; in dce_v10_0_pick_pll()2246 if (pll != ATOM_PPLL_INVALID) in dce_v10_0_pick_pll()2252 if (pll != ATOM_PPLL_INVALID) in dce_v10_0_pick_pll()2265 return ATOM_PPLL_INVALID; in dce_v10_0_pick_pll()2585 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v10_0_crtc_disable()2641 if ((amdgpu_crtc->pll_id == ATOM_PPLL_INVALID) && in dce_v10_0_crtc_mode_fixup()2714 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v10_0_crtc_init()
290 case ATOM_PPLL_INVALID: in amdgpu_atombios_crtc_program_ss()843 case ATOM_PPLL_INVALID: in amdgpu_atombios_crtc_set_pll()
2138 return ATOM_PPLL_INVALID; in dce_v6_0_pick_pll()2144 if (pll != ATOM_PPLL_INVALID) in dce_v6_0_pick_pll()2155 return ATOM_PPLL_INVALID; in dce_v6_0_pick_pll()2472 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v6_0_crtc_disable()2529 if ((amdgpu_crtc->pll_id == ATOM_PPLL_INVALID) && in dce_v6_0_crtc_mode_fixup()2582 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v6_0_crtc_init()
182 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()191 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()195 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()199 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()
124 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()133 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()137 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()141 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()
413 case ATOM_PPLL_INVALID: in atombios_disable_ss()429 case ATOM_PPLL_INVALID: in atombios_disable_ss()494 case ATOM_PPLL_INVALID: in atombios_crtc_program_ss()513 case ATOM_PPLL_INVALID: in atombios_crtc_program_ss()1090 case ATOM_PPLL_INVALID: in atombios_crtc_set_pll()1747 if (test_radeon_crtc->pll_id != ATOM_PPLL_INVALID) in radeon_get_pll_use_mask()1780 if (test_radeon_crtc->pll_id != ATOM_PPLL_INVALID) in radeon_get_shared_dp_ppll()1784 return ATOM_PPLL_INVALID; in radeon_get_shared_dp_ppll()1808 return ATOM_PPLL_INVALID; in radeon_get_shared_nondp_ppll()1823 if (test_radeon_crtc->pll_id != ATOM_PPLL_INVALID) in radeon_get_shared_nondp_ppll()[all …]
82 #define ATOM_PPLL_INVALID 0xFF macro
201 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()
78 ATOM_PPLL_INVALID =0xff, enumerator
99 #define ATOM_PPLL_INVALID 0xFF macro