Searched refs:ANALOGIX_DP_LN1_LINK_TRAINING_CTL (Results 1 – 2 of 2) sorted by relevance
81 #define ANALOGIX_DP_LN1_LINK_TRAINING_CTL 0x690 macro
713 reg = readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_pre_emphasis()716 writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_pre_emphasis()756 writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_link_training()784 return readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_get_lane1_link_training()
