Searched refs:ANALOGIX_DP_LN0_LINK_TRAINING_CTL (Results 1 – 2 of 2) sorted by relevance
80 #define ANALOGIX_DP_LN0_LINK_TRAINING_CTL 0x68C macro
702 reg = readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_pre_emphasis()705 writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_pre_emphasis()747 writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_link_training()779 return readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_get_lane0_link_training()
