Searched refs:AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP (Results 1 – 6 of 6) sorted by relevance
225 AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP = 0, enumerator
3118 &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP); in gfx_v6_0_sw_init()3353 case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP: in gfx_v6_0_set_eop_interrupt_state()
4493 &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP); in gfx_v7_0_sw_init()4830 case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP: in gfx_v7_0_set_eop_interrupt_state()
1261 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + ring->pipe; in gfx_v10_0_gfx_ring_init()4914 case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP: in gfx_v10_0_set_eop_interrupt_state()
2282 &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP); in gfx_v9_0_sw_init()5634 case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP: in gfx_v9_0_set_eop_interrupt_state()
2045 AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP); in gfx_v8_0_sw_init()6607 case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP: in gfx_v8_0_set_eop_interrupt_state()