Searched refs:AM35XX_CONTROL_IP_SW_RESET (Results 1 – 3 of 3) sorted by relevance
61 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()64 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()67 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()69 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()
231 v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); in am35xx_emac_reset()233 omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET); in am35xx_emac_reset()234 omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */ in am35xx_emac_reset()
208 #define AM35XX_CONTROL_IP_SW_RESET (OMAP2_CONTROL_GENERAL + 0x0328) macro
