/Linux-v5.4/arch/c6x/kernel/ |
D | entry.S | 65 ADD .D1X SP,-8,A15 66 || STDW .D2T1 A15:A14,*SP--[16] ; save A15:A14 69 || STDW .D1T1 A13:A12,*A15--[1] 73 || STDW .D1T1 A11:A10,*A15--[1] 77 || STDW .D1T1 A9:A8,*A15--[1] 80 || STDW .D1T1 A7:A6,*A15--[1] 84 || STDW .D1T1 A5:A4,*A15--[1] 87 || STDW .D1T1 A3:A2,*A15--[1] 91 || STDW .D1T1 A1:A0,*A15--[1] 95 || STDW .D1T1 A31:A30,*A15--[1] [all …]
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D | switch_to.S | 37 || STDW .D1T1 A15:A14,*+A4(THREAD_A15_14) 53 || LDDW .D1T1 *+A5(THREAD_A15_14),A15:A14
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/Linux-v5.4/arch/arm/include/debug/ |
D | exynos.S | 23 teq \tmp, #0xf0 @@ A15 27 teq \tmp, #0x100 @@ A15 + A7 but boot to A7
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/Linux-v5.4/arch/arm/boot/dts/ |
D | vexpress-v2p-ca15_a7.dts | 257 /* A15 PLL 0 reference clock */ 266 /* A15 PLL 1 reference clock */ 338 /* A15 CPU core voltage */ 341 regulator-name = "A15 Vcore"; 345 label = "A15 Vcore"; 360 /* Total current for the two A15 cores */ 363 label = "A15 Icore"; 381 /* Total power for the two A15 cores */ 384 label = "A15 Pcore"; 395 /* Total energy for the two A15 cores */ [all …]
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D | exynos5420-cpus.dtsi | 9 * boards: CPU[0123] being the A15. 14 * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422
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D | exynos5422-odroidxu3.dts | 23 /* A15 cluster: VDD_ARM */
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D | xenvm-4.2.dts | 6 * Cortex-A15 MPCore (V2P-CA15)
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D | exynos5422-cpus.dtsi | 13 * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422
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D | am335x-pocketbeagle.dts | 109 …AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_INPUT_PULLUP, MUX_MODE4) /* (A15) xdma_event_intr0…
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D | vexpress-v2p-ca15-tc1.dts | 6 * Cortex-A15 MPCore (V2P-CA15)
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/Linux-v5.4/arch/c6x/lib/ |
D | pop_rts.S | 16 lddw .d2t1 *++B15, A15:A14
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D | push_rts.S | 12 stdw .d2t1 A15:A14, *B15--
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/Linux-v5.4/Documentation/devicetree/bindings/hwmon/ |
D | vexpress.txt | 22 label = "A15 Jcore";
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/Linux-v5.4/Documentation/devicetree/bindings/timer/ |
D | nxp,sysctr-timer.txt | 4 a shared time base to Cortex A15, A7, A53, A73, etc. it is intended for use in
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/Linux-v5.4/arch/arm/mach-hisi/ |
D | Kconfig | 37 bool "Hisilicon HiP04 Cortex A15 family"
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/Linux-v5.4/Documentation/arm/keystone/ |
D | overview.rst | 7 Keystone range of SoCs are based on ARM Cortex-A15 MPCore Processors
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/Linux-v5.4/arch/arm/mach-exynos/ |
D | Kconfig | 74 Samsung EXYNOS5 (Cortex-A15/A7) SoC based systems
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/Linux-v5.4/arch/arm/mach-vexpress/ |
D | Kconfig | 34 - LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs
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/Linux-v5.4/Documentation/arm/ |
D | sunxi.rst | 123 * Quad ARM Cortex-A15, Quad ARM Cortex-A7 based SoCs
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/Linux-v5.4/drivers/soc/tegra/ |
D | Kconfig | 73 Tegra124's "4+1" Cortex-A15 CPU complex.
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/Linux-v5.4/drivers/pinctrl/aspeed/ |
D | pinctrl-aspeed-g5.c | 584 #define A15 71 macro 592 SIG_EXPR_LIST_ALIAS(A15, SPI1MISO, SPI1); 593 SIG_EXPR_LIST_DECL_SINGLE(A15, VBMISO, VGABIOSROM, COND1, VB_DESC); 594 PIN_DECL_2(A15, GPIOI7, SPI1MISO, VBMISO); 596 FUNC_GROUP_DECL(SPI1, B15, C15, A14, A15); 597 FUNC_GROUP_DECL(SPI1DEBUG, C18, E15, B16, C16, B15, C15, A14, A15); 598 FUNC_GROUP_DECL(SPI1PASSTHRU, C18, E15, B16, C16, B15, C15, A14, A15); 599 FUNC_GROUP_DECL(VGABIOSROM, B15, C15, A14, A15); 1908 ASPEED_PINCTRL_PIN(A15), 2527 { PIN_CONFIG_BIAS_PULL_DOWN, { C18, A15 }, SCU8C, 24 }, [all …]
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D | pinctrl-aspeed-g6.c | 549 #define A15 71 macro 550 SIG_EXPR_LIST_DECL_SESG(A15, BMCINT, BMCINT, SIG_DESC_SET(SCU418, 7)); 551 SIG_EXPR_LIST_DECL_SESG(A15, SIOSCI, SIOSCI, SIG_DESC_SET(SCU4B8, 7)); 552 PIN_DECL_2(A15, GPIOI7, BMCINT, SIOSCI); 553 FUNC_GROUP_DECL(BMCINT, A15); 554 FUNC_GROUP_DECL(SIOSCI, A15); 1552 ASPEED_PINCTRL_PIN(A15),
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D | pinctrl-aspeed-g4.c | 334 #define A15 35 macro 335 SIG_EXPR_LIST_DECL_SINGLE(A15, NRI3, NRI3, SIG_DESC_SET(SCU80, 19)); 338 SIG_EXPR_LIST_DECL_DUAL(A15, GPIE2OUT, GPIE2, GPIE); 339 PIN_DECL_2(A15, GPIOE3, NRI3, GPIE2OUT); 341 FUNC_GROUP_DECL(NRI3, A15); 342 FUNC_GROUP_DECL(GPIE2, B15, A15); 1914 ASPEED_PINCTRL_PIN(A15), 2539 { PIN_CONFIG_INPUT_DEBOUNCE, { B15, A15 }, SCUA8, 25 },
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/Linux-v5.4/arch/arm/crypto/ |
D | Kconfig | 91 Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
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/Linux-v5.4/arch/arm/kernel/ |
D | entry-header.S | 340 @ We must avoid clrex due to Cortex-A15 erratum #830321
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