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Searched refs:MASK (Results 1 – 25 of 103) sorted by relevance

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/Linux-v5.4/include/linux/soc/ti/
Dknav_dma.h25 #define MASK(x) (BIT(x) - 1) macro
26 #define KNAV_DMA_DESC_PKT_LEN_MASK MASK(22)
30 #define KNAV_DMA_DESC_TAG_MASK MASK(8)
38 #define KNAV_DMA_DESC_PSLEN_MASK MASK(6)
40 #define KNAV_DMA_DESC_ERR_FLAG_MASK MASK(4)
42 #define KNAV_DMA_DESC_PSFLAG_MASK MASK(4)
44 #define KNAV_DMA_DESC_RETQ_MASK MASK(14)
45 #define KNAV_DMA_DESC_BUF_LEN_MASK MASK(22)
46 #define KNAV_DMA_DESC_EFLAGS_MASK MASK(4)
/Linux-v5.4/arch/x86/kernel/cpu/mce/
Dseverity.c56 #define MASK(x, y) .mask = x, .result = y macro
94 NOSER, MASK(MCI_STATUS_UC|MCI_STATUS_DEFERRED|MCI_STATUS_POISON, MCI_STATUS_DEFERRED)
110 SER, MASK(MCI_UC_AR|MCACOD_SCRUBMSK, MCI_STATUS_UC|MCACOD_SCRUB)
114 SER, MASK(MCI_UC_AR|MCACOD, MCI_STATUS_UC|MCACOD_L3WB)
120 SER, MASK(MCI_UC_SAR, MCI_STATUS_UC)
125 MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_STATUS_UC|MCI_STATUS_AR)
141 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR, MCI_UC_SAR|MCI_ADDR),
146 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
151 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
156 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),
[all …]
/Linux-v5.4/arch/arm/mach-rpc/
Dirq.c15 #define MASK 0x08 macro
37 val = readb(base + MASK); in iomd_irq_mask_ack()
38 writeb(val & ~mask, base + MASK); in iomd_irq_mask_ack()
47 val = readb(base + MASK); in iomd_irq_mask()
48 writeb(val & ~mask, base + MASK); in iomd_irq_mask()
56 val = readb(base + MASK); in iomd_irq_unmask()
57 writeb(val | mask, base + MASK); in iomd_irq_unmask()
/Linux-v5.4/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dgk20a.h30 #define MASK(w) ((1 << (w)) - 1) macro
49 (MASK(GPCPLL_CFG3_VCO_CTRL_WIDTH) << GPCPLL_CFG3_VCO_CTRL_SHIFT)
59 (MASK(GPCPLL_COEFF_N_WIDTH) << GPCPLL_COEFF_N_SHIFT)
87 #define GPC2CLK_OUT_VCODIV_MASK (MASK(GPC2CLK_OUT_VCODIV_WIDTH) << \
92 #define GPC2CLK_OUT_INIT_MASK ((MASK(GPC2CLK_OUT_SDIV14_INDIV4_WIDTH) << \
94 | (MASK(GPC2CLK_OUT_VCODIV_WIDTH) << GPC2CLK_OUT_VCODIV_SHIFT)\
95 | (MASK(GPC2CLK_OUT_BYPDIV_WIDTH) << GPC2CLK_OUT_BYPDIV_SHIFT))
Dgm20b.c41 (MASK(GPCPLL_CFG2_SDM_DIN_WIDTH) << GPCPLL_CFG2_SDM_DIN_SHIFT)
45 (MASK(GPCPLL_CFG2_SDM_DIN_NEW_WIDTH) << GPCPLL_CFG2_SDM_DIN_NEW_SHIFT)
53 (MASK(GPCPLL_DVFS0_DFS_COEFF_WIDTH) << GPCPLL_DVFS0_DFS_COEFF_SHIFT)
57 (MASK(GPCPLL_DVFS0_DFS_DET_MAX_WIDTH) << GPCPLL_DVFS0_DFS_DET_MAX_SHIFT)
169 MASK(GPCPLL_CFG2_SDM_DIN_WIDTH); in gm20b_pllg_read_mnp()
201 dvfs->dfs_coeff = min_t(u32, coeff, MASK(GPCPLL_DVFS0_DFS_COEFF_WIDTH)); in gm20b_dvfs_calc_det_coeff()
254 rem = ((u32)n) & MASK(DFS_DET_RANGE); in gm20b_dvfs_calc_ndiv()
259 *sdm_din = (rem >> BITS_PER_BYTE) & MASK(GPCPLL_CFG2_SDM_DIN_WIDTH); in gm20b_dvfs_calc_ndiv()
536 nvkm_mask(device, GPC_BCAST_GPCPLL_DVFS2, MASK(DFS_DET_RANGE + 1), in gm20b_dvfs_program_ext_cal()
788 data &= MASK(GPCPLL_CFG3_PLL_DFS_TESTOUT_WIDTH); in gm20b_clk_init_dvfs()
[all …]
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/gpio/
Dhw_gpio.c45 REG_GET(MASK_reg, MASK, &gpio->store.mask); in store_registers()
54 REG_UPDATE(MASK_reg, MASK, gpio->store.mask); in restore_registers()
152 REG_UPDATE(MASK_reg, MASK, 1); in dal_hw_gpio_config_mode()
158 REG_UPDATE(MASK_reg, MASK, 1); in dal_hw_gpio_config_mode()
164 REG_UPDATE(MASK_reg, MASK, 1); in dal_hw_gpio_config_mode()
168 REG_UPDATE(MASK_reg, MASK, 0); in dal_hw_gpio_config_mode()
172 REG_UPDATE(MASK_reg, MASK, 0); in dal_hw_gpio_config_mode()
Dddc_regs.h41 DDC_GPIO_REG_LIST_ENTRY(MASK,cd,id),\
66 DDC_GPIO_VGA_REG_LIST_ENTRY(MASK,cd),\
83 DDC_GPIO_I2C_REG_LIST_ENTRY(MASK,cd),\
/Linux-v5.4/tools/testing/selftests/bpf/progs/
Dtest_pkt_md_access.c13 #define TEST_FIELD(TYPE, FIELD, MASK) \ argument
16 if (tmp != ((*(volatile __u32 *)&skb->FIELD) & MASK)) \
21 #define TEST_FIELD(TYPE, FIELD, MASK) \ argument
25 if (tmp != ((*(volatile __u32 *)&skb->FIELD) & MASK)) \
/Linux-v5.4/drivers/scsi/sym53c8xx_2/
Dsym_fw2.h228 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
316 SCR_INT ^ IFTRUE (MASK (HX_DMAP_DIRTY, HX_DMAP_DIRTY)),
348 SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
438 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
462 SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),
521 SCR_JUMP ^ IFTRUE (MASK (WSS, WSS)),
681 SCR_JUMP ^ IFFALSE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),
898 SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
904 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
1073 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
[all …]
Dsym_fw1.h236 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
363 SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
453 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
478 SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),
538 SCR_JUMP ^ IFTRUE (MASK (WSS, WSS)),
704 SCR_JUMP ^ IFFALSE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),
949 SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
955 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
1187 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
1207 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
[all …]
/Linux-v5.4/include/linux/irqchip/
Darm-gic-v3.h172 GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK)
174 GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK)
199 GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, MASK)
201 GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, MASK)
257 GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, MASK)
259 GIC_BASER_CACHEABILITY(GICR_VPROPBASER, OUTER, MASK)
283 GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, MASK)
285 GIC_BASER_CACHEABILITY(GICR_VPENDBASER, OUTER, MASK)
358 GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, MASK)
360 GIC_BASER_CACHEABILITY(GITS_CBASER, OUTER, MASK)
[all …]
/Linux-v5.4/drivers/gpu/drm/hisilicon/kirin/
Dkirin_ade_reg.h13 #define MASK(x) (BIT(x) - 1) macro
17 #define FRM_END_START_MASK MASK(2)
50 #define CH_OVLY_SEL_MASK MASK(2)
100 #define QOSGENERATOR_MODE_MASK MASK(2)
Dkirin_drm_ade.c103 MASK(1), !!val); in ade_update_reload_bit()
129 writel(MASK(32), base + ADE_SOFT_RST_SEL(0)); in ade_init()
130 writel(MASK(32), base + ADE_SOFT_RST_SEL(1)); in ade_init()
131 writel(MASK(32), base + ADE_RELOAD_DIS(0)); in ade_init()
132 writel(MASK(32), base + ADE_RELOAD_DIS(1)); in ade_init()
139 ade_update_bits(base + LDI_INT_EN, UNDERFLOW_INT_EN_OFST, MASK(1), 1); in ade_init()
287 MASK(1), 1); in ade_crtc_enable_vblank()
304 MASK(1), 0); in ade_crtc_disable_vblank()
331 MASK(1), 1); in ade_irq_handler()
336 MASK(1), 1); in ade_irq_handler()
[all …]
/Linux-v5.4/net/openvswitch/
Ddatapath.h242 #define OVS_MASKED(OLD, KEY, MASK) ((KEY) | ((OLD) & ~(MASK))) argument
243 #define OVS_SET_MASKED(OLD, KEY, MASK) ((OLD) = OVS_MASKED(OLD, KEY, MASK)) argument
/Linux-v5.4/drivers/scsi/
Dvmw_pvscsi.h33 #define MASK(n) ((1 << (n)) - 1) /* make an n-bit mask */ macro
412 #define PVSCSI_INTR_CMPL_MASK MASK(2)
416 #define PVSCSI_INTR_MSG_MASK (MASK(2) << 2)
418 #define PVSCSI_INTR_ALL_SUPPORTED MASK(4)
/Linux-v5.4/tools/testing/selftests/ftrace/test.d/ftrace/
Dfunc_cpumask.tc28 MASK=0x`cat tracing_cpumask`
29 test `printf "%d" $MASK` -eq 2 || do_reset
/Linux-v5.4/drivers/dma/dw/
Dcore.c127 channel_set_bit(dw, MASK.XFER, dwc->mask); in dwc_initialize()
128 channel_set_bit(dw, MASK.ERROR, dwc->mask); in dwc_initialize()
495 channel_set_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_tasklet()
496 channel_set_bit(dw, MASK.ERROR, dw->all_chan_mask); in dw_dma_tasklet()
519 channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_interrupt()
520 channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask); in dw_dma_interrupt()
521 channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask); in dw_dma_interrupt()
530 channel_clear_bit(dw, MASK.XFER, (1 << 8) - 1); in dw_dma_interrupt()
531 channel_clear_bit(dw, MASK.BLOCK, (1 << 8) - 1); in dw_dma_interrupt()
532 channel_clear_bit(dw, MASK.SRC_TRAN, (1 << 8) - 1); in dw_dma_interrupt()
[all …]
/Linux-v5.4/drivers/clk/tegra/
Dclk-tegra-periph.c130 #define MASK(x) (BIT(x) - 1) macro
135 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
142 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
149 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
155 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
161 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
168 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
175 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
182 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
189 30, MASK(2), 0, 0, 16, 1, TEGRA_DIVIDER_UART| \
[all …]
/Linux-v5.4/lib/raid6/
Dint.uc69 * The MASK() operation returns 0xFF in any byte for which the high
72 static inline __attribute_const__ unative_t MASK(unative_t v)
99 w2$$ = MASK(wq$$);
129 w2$$ = MASK(wq$$);
137 w2$$ = MASK(wq$$);
Dneon.uc43 * The MASK() operation returns 0xFF in any byte for which the high
46 static inline unative_t MASK(unative_t v)
74 w2$$ = MASK(wq$$);
108 w2$$ = MASK(wq$$);
140 w2$$ = MASK(wq$$);
Ds390vx.uc38 * For each of the 16 bytes in the vector register y the MASK()
43 static inline void MASK(int x, int y)
101 MASK(16+$$,8+$$);
135 MASK(16+$$,8+$$);
145 MASK(16+$$,8+$$);
/Linux-v5.4/scripts/
Dgfp-translate79 MASK=`echo $LINE | awk '{print $3}'`
80 if [ $(($GFPMASK&$MASK)) -ne 0 ]; then
/Linux-v5.4/include/video/
Dgbe.h81 #define MASK(msb, lsb) \ macro
84 ( ((u32)(v) & MASK(msb,lsb)) >> (lsb) )
86 ( (v) = ((v)&~MASK(msb,lsb)) | (( (u32)(f)<<(lsb) ) & MASK(msb,lsb)) )
/Linux-v5.4/drivers/gpu/drm/i915/
Di915_syncmap.c33 #define MASK (KSYNCMAP - 1) macro
114 return (id >> p->height) & MASK; in __sync_branch_idx()
121 return id & MASK; in __sync_leaf_idx()
305 idx = p->prefix >> (above - SHIFT) & MASK; in __sync_set()
/Linux-v5.4/arch/arm64/crypto/
Dghash-ce-core.S15 MASK .req v4
158 movi MASK.16b, #0xe1
159 shl MASK.2d, MASK.2d, #57
200 pmull T2.1q, XL.1d, MASK.1d
208 pmull XL.1q, XL.1d, MASK.1d
403 movi MASK.16b, #0xe1
407 shl MASK.2d, MASK.2d, #57
494 pmull T2.1q, XL.1d, MASK.1d
507 pmull XL.1q, XL.1d, MASK.1d

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