/Linux-v5.15/drivers/net/ethernet/intel/igc/ |
D | igc_tsn.c | 60 wr32(IGC_TXPBS, I225_TXPBSIZE_DEFAULT); in igc_tsn_disable_offload() 61 wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_DEFAULT); in igc_tsn_disable_offload() 66 wr32(IGC_TQAVCTRL, tqavctrl); in igc_tsn_disable_offload() 69 wr32(IGC_TXQCTL(i), 0); in igc_tsn_disable_offload() 70 wr32(IGC_STQT(i), 0); in igc_tsn_disable_offload() 71 wr32(IGC_ENDQT(i), NSEC_PER_SEC); in igc_tsn_disable_offload() 74 wr32(IGC_QBVCYCLET_S, 0); in igc_tsn_disable_offload() 75 wr32(IGC_QBVCYCLET, NSEC_PER_SEC); in igc_tsn_disable_offload() 93 wr32(IGC_TSAUXC, 0); in igc_tsn_enable_offload() 94 wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_TSN); in igc_tsn_enable_offload() [all …]
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D | igc_base.c | 32 wr32(IGC_IMC, 0xffffffff); in igc_reset_hw_base() 34 wr32(IGC_RCTL, 0); in igc_reset_hw_base() 35 wr32(IGC_TCTL, IGC_TCTL_PSP); in igc_reset_hw_base() 43 wr32(IGC_CTRL, ctrl | IGC_CTRL_DEV_RST); in igc_reset_hw_base() 55 wr32(IGC_IMC, 0xffffffff); in igc_reset_hw_base() 116 wr32(IGC_CTRL, ctrl); in igc_setup_copper_link_base() 346 wr32(IGC_RFCTL, rfctl); in igc_rx_fifo_flush_base() 354 wr32(IGC_RXDCTL(i), in igc_rx_fifo_flush_base() 374 wr32(IGC_RFCTL, rfctl & ~IGC_RFCTL_LEF); in igc_rx_fifo_flush_base() 377 wr32(IGC_RLPML, 0); in igc_rx_fifo_flush_base() [all …]
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D | igc_ptp.c | 43 wr32(IGC_SYSTIML, ts->tv_nsec); in igc_ptp_write_i225() 44 wr32(IGC_SYSTIMH, ts->tv_sec); in igc_ptp_write_i225() 68 wr32(IGC_TIMINCA, inca); in igc_ptp_adjfine_i225() 205 wr32(IGC_TSSDP, tssdp); in igc_pin_perout() 206 wr32(IGC_CTRL, ctrl); in igc_pin_perout() 207 wr32(IGC_CTRL_EXT, ctrl_ext); in igc_pin_perout() 241 wr32(IGC_TSSDP, tssdp); in igc_pin_extts() 242 wr32(IGC_CTRL, ctrl); in igc_pin_extts() 243 wr32(IGC_CTRL_EXT, ctrl_ext); in igc_pin_extts() 297 wr32(IGC_TSAUXC, tsauxc); in igc_ptp_feature_enable_i225() [all …]
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D | igc_diag.c | 46 wr32(reg, test_pattern[pat] & write); in reg_pattern_test() 53 wr32(reg, before); in reg_pattern_test() 56 wr32(reg, before); in reg_pattern_test() 68 wr32(reg, write & mask); in reg_set_and_check() 75 wr32(reg, before); in reg_set_and_check() 78 wr32(reg, before); in reg_set_and_check() 97 wr32(IGC_STATUS, toggle); in igc_reg_test() 107 wr32(IGC_STATUS, before); in igc_reg_test()
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D | igc_mac.c | 29 wr32(IGC_CTRL, ctrl); in igc_disable_pcie_master() 103 wr32(IGC_FCRTL, fcrtl); in igc_set_fc_watermarks() 104 wr32(IGC_FCRTH, fcrth); in igc_set_fc_watermarks() 154 wr32(IGC_FCT, FLOW_CONTROL_TYPE); in igc_setup_link() 155 wr32(IGC_FCAH, FLOW_CONTROL_ADDRESS_HIGH); in igc_setup_link() 156 wr32(IGC_FCAL, FLOW_CONTROL_ADDRESS_LOW); in igc_setup_link() 158 wr32(IGC_FCTTV, hw->fc.pause_time); in igc_setup_link() 223 wr32(IGC_CTRL, ctrl); in igc_force_mac_fc() 341 wr32(IGC_RAL(index), rar_low); in igc_rar_set() 343 wr32(IGC_RAH(index), rar_high); in igc_rar_set() [all …]
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D | igc_i225.c | 82 wr32(IGC_SWSM, swsm | IGC_SWSM_SWESMBI); in igc_get_hw_semaphore_i225() 140 wr32(IGC_SW_FW_SYNC, swfw_sync); in igc_acquire_swfw_sync_i225() 164 wr32(IGC_SW_FW_SYNC, swfw_sync); in igc_release_swfw_sync_i225() 241 wr32(IGC_SRWR, eewr); in igc_write_nvm_srwr() 376 wr32(IGC_EECD, flup); in igc_update_flash_i225() 539 wr32(IGC_IPCNFG, ipcnfg); in igc_set_eee_i225() 540 wr32(IGC_EEER, eeer); in igc_set_eee_i225() 572 wr32(IGC_LTRC, ltrc); in igc_set_ltr_i225() 633 wr32(IGC_LTRMINV, ltrv); in igc_set_ltr_i225() 640 wr32(IGC_LTRMAXV, ltrv); in igc_set_ltr_i225()
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D | igc_main.c | 117 wr32(IGC_VET, ETH_P_8021Q); in igc_reset() 159 wr32(IGC_CTRL_EXT, in igc_release_hw_control() 178 wr32(IGC_CTRL_EXT, in igc_get_hw_control() 615 wr32(IGC_RXDCTL(reg_idx), 0); in igc_configure_rx_ring() 618 wr32(IGC_RDBAL(reg_idx), in igc_configure_rx_ring() 620 wr32(IGC_RDBAH(reg_idx), rdba >> 32); in igc_configure_rx_ring() 621 wr32(IGC_RDLEN(reg_idx), in igc_configure_rx_ring() 626 wr32(IGC_RDH(reg_idx), 0); in igc_configure_rx_ring() 644 wr32(IGC_SRRCTL(reg_idx), srrctl); in igc_configure_rx_ring() 661 wr32(IGC_RXDCTL(reg_idx), rxdctl); in igc_configure_rx_ring() [all …]
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D | igc_nvm.c | 52 wr32(IGC_EECD, eecd | IGC_EECD_REQ); in igc_acquire_nvm() 65 wr32(IGC_EECD, eecd); in igc_acquire_nvm() 85 wr32(IGC_EECD, eecd); in igc_release_nvm() 117 wr32(IGC_EERD, eerd); in igc_read_nvm_eerd()
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/Linux-v5.15/drivers/net/ethernet/intel/igb/ |
D | igb_ptp.c | 139 wr32(E1000_SYSTIML, ts->tv_nsec); in igb_ptp_write_i210() 140 wr32(E1000_SYSTIMH, (u32)ts->tv_sec); in igb_ptp_write_i210() 218 wr32(E1000_TIMINCA, INCPERIOD_82576 | (incvalue & INCVALUE_82576_MASK)); in igb_ptp_adjfreq_82576() 244 wr32(E1000_TIMINCA, inca); in igb_ptp_adjfine_82580() 439 wr32(E1000_TSSDP, tssdp); in igb_pin_extts() 440 wr32(E1000_CTRL, ctrl); in igb_pin_extts() 441 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_pin_extts() 505 wr32(E1000_TSSDP, tssdp); in igb_pin_perout() 506 wr32(E1000_CTRL, ctrl); in igb_pin_perout() 507 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_pin_perout() [all …]
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D | e1000_82575.c | 202 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_init_phy_params_82575() 504 wr32(E1000_CTRL_EXT, ctrl_ext | E1000_CTRL_I2C_ENA); in igb_set_sfp_media_type_82575() 550 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_set_sfp_media_type_82575() 668 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_get_invariants_82575() 874 wr32(E1000_CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_SDP3_DATA); in igb_get_phy_id_82575() 906 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_get_phy_id_82575() 1062 wr32(E1000_82580_PHY_POWER_MGMT, data); in igb_set_d0_lplu_state_82580() 1106 wr32(E1000_82580_PHY_POWER_MGMT, data); in igb_set_d3_lplu_state_82580() 1190 wr32(E1000_SW_FW_SYNC, swfw_sync); in igb_acquire_swfw_sync_82575() 1215 wr32(E1000_SW_FW_SYNC, swfw_sync); in igb_release_swfw_sync_82575() [all …]
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D | e1000_mac.c | 243 wr32(E1000_VLVF(vlvf_index), 0); in igb_vfta_set() 266 wr32(E1000_VLVF(vlvf_index), bits | vlan | E1000_VLVF_VLANID_ENABLE); in igb_vfta_set() 377 wr32(E1000_RAL(index), rar_low); in igb_rar_set() 379 wr32(E1000_RAH(index), rar_high); in igb_rar_set() 716 wr32(E1000_FCT, FLOW_CONTROL_TYPE); in igb_setup_link() 717 wr32(E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH); in igb_setup_link() 718 wr32(E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW); in igb_setup_link() 720 wr32(E1000_FCTTV, hw->fc.pause_time); in igb_setup_link() 746 wr32(E1000_TCTL, tctl); in igb_config_collision_dist() 779 wr32(E1000_FCRTL, fcrtl); in igb_set_fc_watermarks() [all …]
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D | e1000_i210.c | 64 wr32(E1000_SWSM, swsm | E1000_SWSM_SWESMBI); in igb_get_hw_semaphore_i210() 148 wr32(E1000_SW_FW_SYNC, swfw_sync); in igb_acquire_swfw_sync_i210() 172 wr32(E1000_SW_FW_SYNC, swfw_sync); in igb_release_swfw_sync_i210() 250 wr32(E1000_SRWR, eewr); in igb_write_nvm_srwr() 679 wr32(E1000_EECD, flup); in igb_update_flash_i210() 837 wr32(E1000_MDICNFG, reg_val); in igb_pll_workaround_i210() 859 wr32(E1000_CTRL, ctrl|E1000_CTRL_PHY_RST); in igb_pll_workaround_i210() 863 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_pll_workaround_i210() 865 wr32(E1000_WUC, 0); in igb_pll_workaround_i210() 867 wr32(E1000_EEARBC_I210, reg_val); in igb_pll_workaround_i210() [all …]
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D | igb_main.c | 587 wr32(E1000_I2CPARAMS, i2cctl); in igb_set_i2c_data() 612 wr32(E1000_I2CPARAMS, i2cctl); in igb_set_i2c_clk() 885 wr32(E1000_CTRL_EXT, tmp); in igb_configure_msix() 902 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE | in igb_configure_msix() 910 wr32(E1000_IVAR_MISC, tmp); in igb_configure_msix() 1150 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ); in igb_set_interrupt_capability() 1487 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask); in igb_irq_disable() 1488 wr32(E1000_EIMC, adapter->eims_enable_mask); in igb_irq_disable() 1490 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask); in igb_irq_disable() 1493 wr32(E1000_IAM, 0); in igb_irq_disable() [all …]
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D | e1000_mbx.c | 249 wr32(E1000_MBVFICR, mask); in igb_check_for_bit_pf() 307 wr32(E1000_VFLRE, BIT(vf_number)); in igb_check_for_rst_pf() 329 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_PFU); in igb_obtain_mbx_lock_pf() 357 wr32(E1000_P2VMAILBOX(vf_number), in igb_release_mbx_lock_pf() 392 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_STS); in igb_write_mbx_pf() 431 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_ACK); in igb_read_mbx_pf() 433 wr32(E1000_P2VMAILBOX(vf_number), in igb_read_mbx_pf()
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D | e1000_nvm.c | 20 wr32(E1000_EECD, *eecd); in igb_raise_eec_clk() 35 wr32(E1000_EECD, *eecd); in igb_lower_eec_clk() 66 wr32(E1000_EECD, eecd); in igb_shift_out_eec_bits() 78 wr32(E1000_EECD, eecd); in igb_shift_out_eec_bits() 165 wr32(E1000_EECD, eecd | E1000_EECD_REQ); in igb_acquire_nvm() 178 wr32(E1000_EECD, eecd); in igb_acquire_nvm() 200 wr32(E1000_EECD, eecd); in igb_standby_nvm() 204 wr32(E1000_EECD, eecd); in igb_standby_nvm() 242 wr32(E1000_EECD, eecd); in igb_release_nvm() 263 wr32(E1000_EECD, eecd); in igb_ready_nvm_eeprom() [all …]
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/Linux-v5.15/drivers/net/ethernet/intel/i40e/ |
D | i40e_ptp.c | 316 wr32(hw, I40E_PRTTSYN_TIME_L, ns & 0xFFFFFFFF); in i40e_ptp_write() 317 wr32(hw, I40E_PRTTSYN_TIME_H, ns >> 32); in i40e_ptp_write() 376 wr32(hw, I40E_PRTTSYN_INC_L, adj & 0xFFFFFFFF); in i40e_ptp_adjfreq() 377 wr32(hw, I40E_PRTTSYN_INC_H, adj >> 32); in i40e_ptp_adjfreq() 394 wr32(hw, I40E_PRTTSYN_AUX_0(1), 0); in i40e_ptp_set_1pps_signal_hw() 395 wr32(hw, I40E_PRTTSYN_AUX_1(1), I40E_PRTTSYN_AUX_1_INSTNT); in i40e_ptp_set_1pps_signal_hw() 396 wr32(hw, I40E_PRTTSYN_AUX_0(1), I40E_PRTTSYN_AUX_0_OUT_ENABLE); in i40e_ptp_set_1pps_signal_hw() 404 wr32(hw, I40E_PRTTSYN_TGT_L(1), ns & 0xFFFFFFFF); in i40e_ptp_set_1pps_signal_hw() 406 wr32(hw, I40E_PRTTSYN_TGT_H(1), ns >> 32); in i40e_ptp_set_1pps_signal_hw() 407 wr32(hw, I40E_PRTTSYN_CLKO(1), I40E_PTP_HALF_SECOND); in i40e_ptp_set_1pps_signal_hw() [all …]
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D | i40e_hmc.h | 108 wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \ 109 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \ 110 wr32((hw), I40E_PFHMC_SDCMD, val3); \ 127 wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \ 128 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \ 129 wr32((hw), I40E_PFHMC_SDCMD, val3); \ 139 wr32((hw), I40E_PFHMC_PDINV, \
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D | i40e_adminq.c | 275 wr32(hw, hw->aq.asq.head, 0); in i40e_config_asq_regs() 276 wr32(hw, hw->aq.asq.tail, 0); in i40e_config_asq_regs() 279 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs() 281 wr32(hw, hw->aq.asq.bal, lower_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs() 282 wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs() 304 wr32(hw, hw->aq.arq.head, 0); in i40e_config_arq_regs() 305 wr32(hw, hw->aq.arq.tail, 0); in i40e_config_arq_regs() 308 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in i40e_config_arq_regs() 310 wr32(hw, hw->aq.arq.bal, lower_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs() 311 wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs() [all …]
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D | i40e_dcb.c | 1338 wr32(hw, I40E_PRTDCB_RETSC, reg); in i40e_dcb_hw_rx_fifo_config() 1394 wr32(hw, I40E_PRT_SWR_PM_THR, reg); in i40e_dcb_hw_rx_cmd_monitor_config() 1400 wr32(hw, I40E_PRTDCB_RPPMC, reg); in i40e_dcb_hw_rx_cmd_monitor_config() 1446 wr32(hw, I40E_PRTDCB_MFLCN, reg); in i40e_dcb_hw_pfc_config() 1454 wr32(hw, I40E_PRTDCB_FCCFG, reg); in i40e_dcb_hw_pfc_config() 1461 wr32(hw, I40E_PRTMAC_HSEC_CTL_RX_ENABLE_GPP, reg); in i40e_dcb_hw_pfc_config() 1467 wr32(hw, I40E_PRTMAC_HSEC_CTL_RX_ENABLE_PPP, reg); in i40e_dcb_hw_pfc_config() 1474 wr32(hw, I40E_PRTMAC_HSEC_CTL_RX_PAUSE_ENABLE, reg); in i40e_dcb_hw_pfc_config() 1481 wr32(hw, I40E_PRTMAC_HSEC_CTL_TX_PAUSE_ENABLE, reg); in i40e_dcb_hw_pfc_config() 1491 wr32(hw, I40E_PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(i), reg); in i40e_dcb_hw_pfc_config() [all …]
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/Linux-v5.15/drivers/net/ethernet/intel/iavf/ |
D | iavf_adminq.c | 262 wr32(hw, hw->aq.asq.head, 0); in iavf_config_asq_regs() 263 wr32(hw, hw->aq.asq.tail, 0); in iavf_config_asq_regs() 266 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in iavf_config_asq_regs() 268 wr32(hw, hw->aq.asq.bal, lower_32_bits(hw->aq.asq.desc_buf.pa)); in iavf_config_asq_regs() 269 wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa)); in iavf_config_asq_regs() 291 wr32(hw, hw->aq.arq.head, 0); in iavf_config_arq_regs() 292 wr32(hw, hw->aq.arq.tail, 0); in iavf_config_arq_regs() 295 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in iavf_config_arq_regs() 297 wr32(hw, hw->aq.arq.bal, lower_32_bits(hw->aq.arq.desc_buf.pa)); in iavf_config_arq_regs() 298 wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa)); in iavf_config_arq_regs() [all …]
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/Linux-v5.15/drivers/net/ethernet/intel/ice/ |
D | ice_ptp_hw.c | 432 wr32(hw, PFTSYN_SEM + (PFTSYN_SEM_BYTES * hw->pf_id), 0); in ice_ptp_unlock() 468 wr32(hw, GLTSYN_CMD, cmd_val); in ice_ptp_src_cmd() 499 wr32(hw, GLTSYN_CMD_SYNC, SYNC_EXEC_CMD); in ice_ptp_tmr_cmd() 525 wr32(hw, GLTSYN_SHTIME_L(tmr_idx), lower_32_bits(time)); in ice_ptp_init_time() 526 wr32(hw, GLTSYN_SHTIME_H(tmr_idx), upper_32_bits(time)); in ice_ptp_init_time() 527 wr32(hw, GLTSYN_SHTIME_0(tmr_idx), 0); in ice_ptp_init_time() 560 wr32(hw, GLTSYN_SHADJ_L(tmr_idx), lower_32_bits(incval)); in ice_ptp_write_incval() 561 wr32(hw, GLTSYN_SHADJ_H(tmr_idx), upper_32_bits(incval)); in ice_ptp_write_incval() 616 wr32(hw, GLTSYN_SHADJ_L(tmr_idx), 0); in ice_ptp_adj_clock() 617 wr32(hw, GLTSYN_SHADJ_H(tmr_idx), adj); in ice_ptp_adj_clock()
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D | ice_controlq.c | 276 wr32(hw, ring->head, 0); in ice_cfg_cq_regs() 277 wr32(hw, ring->tail, 0); in ice_cfg_cq_regs() 280 wr32(hw, ring->len, (num_entries | ring->len_ena_mask)); in ice_cfg_cq_regs() 281 wr32(hw, ring->bal, lower_32_bits(ring->desc_buf.pa)); in ice_cfg_cq_regs() 282 wr32(hw, ring->bah, upper_32_bits(ring->desc_buf.pa)); in ice_cfg_cq_regs() 321 wr32(hw, cq->rq.tail, (u32)(cq->num_rq_entries - 1)); in ice_cfg_rq_regs() 490 wr32(hw, cq->sq.head, 0); in ice_shutdown_sq() 491 wr32(hw, cq->sq.tail, 0); in ice_shutdown_sq() 492 wr32(hw, cq->sq.len, 0); in ice_shutdown_sq() 493 wr32(hw, cq->sq.bal, 0); in ice_shutdown_sq() [all …]
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D | ice_ptp.c | 37 wr32(&pf->hw, PFINT_OICR_ENA, val); in ice_set_tx_tstamp() 579 wr32(hw, PFINT_OICR_ENA, irq_reg); in ice_ptp_cfg_extts() 580 wr32(hw, GLTSYN_AUX_IN(chan, tmr_idx), aux_reg); in ice_ptp_cfg_extts() 581 wr32(hw, GLGEN_GPIO_CTL(gpio_pin), gpio_reg); in ice_ptp_cfg_extts() 607 wr32(hw, GLTSYN_AUX_OUT(chan, tmr_idx), 0); in ice_ptp_cfg_clkout() 613 wr32(hw, GLTSYN_CLKO(chan, tmr_idx), 0); in ice_ptp_cfg_clkout() 614 wr32(hw, GLTSYN_TGT_L(chan, tmr_idx), 0); in ice_ptp_cfg_clkout() 615 wr32(hw, GLTSYN_TGT_H(chan, tmr_idx), 0); in ice_ptp_cfg_clkout() 619 wr32(hw, GLGEN_GPIO_CTL(gpio_pin), val); in ice_ptp_cfg_clkout() 650 wr32(hw, GLTSYN_CLKO(chan, tmr_idx), lower_32_bits(period)); in ice_ptp_cfg_clkout() [all …]
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/Linux-v5.15/drivers/infiniband/hw/irdma/ |
D | i40iw_hw.c | 116 wr32(dev->hw, I40E_PFINT_LNKLSTN(idx - 1), reg_val); in i40iw_config_ceq() 120 wr32(dev->hw, I40E_PFINT_DYN_CTLN(idx - 1), reg_val); in i40iw_config_ceq() 127 wr32(dev->hw, i40iw_regs[IRDMA_GLINT_CEQCTL] + 4 * ceq_id, reg_val); in i40iw_config_ceq() 142 wr32(dev->hw, i40iw_regs[IRDMA_GLINT_DYN_CTL] + 4 * (idx - 1), val); in i40iw_ena_irq() 152 wr32(dev->hw, i40iw_regs[IRDMA_GLINT_DYN_CTL] + 4 * (idx - 1), 0); in i40iw_disable_irq()
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/Linux-v5.15/drivers/gpu/drm/nouveau/nvkm/core/ |
D | gpuobj.c | 77 .wr32 = nvkm_gpuobj_wr32_fast, 85 .wr32 = nvkm_gpuobj_heap_wr32, 140 .wr32 = nvkm_gpuobj_wr32_fast, 148 .wr32 = nvkm_gpuobj_wr32,
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