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Searched refs:vlv_dpio_read (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/i915/display/
Dintel_dpio_phy.c664 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW10(ch)); in chv_set_phy_signal_level()
671 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW10(ch)); in chv_set_phy_signal_level()
678 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW9(ch)); in chv_set_phy_signal_level()
684 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW9(ch)); in chv_set_phy_signal_level()
692 val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW4(ch, i)); in chv_set_phy_signal_level()
700 val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW2(ch, i)); in chv_set_phy_signal_level()
723 val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW3(ch, i)); in chv_set_phy_signal_level()
732 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW10(ch)); in chv_set_phy_signal_level()
737 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW10(ch)); in chv_set_phy_signal_level()
755 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW0(ch)); in chv_data_lane_soft_reset()
[all …]
Dintel_dpll.c1431 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW9(1)); in vlv_pllb_recal_opamp()
1436 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_REF_DW13); in vlv_pllb_recal_opamp()
1441 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW9(1)); in vlv_pllb_recal_opamp()
1445 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_REF_DW13); in vlv_pllb_recal_opamp()
1496 tmp = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW14(port)); in _chv_enable_pll()
1592 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW8(pipe)); in vlv_prepare_pll()
1644 coreclk = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW7(pipe)); in vlv_prepare_pll()
1706 dpio_val = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW3(port)); in chv_prepare_pll()
1714 dpio_val = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW9(port)); in chv_prepare_pll()
1747 dpio_val = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW8(port)); in chv_prepare_pll()
[all …]
Dintel_display_power.c1666 tmp = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW28); in chv_dpio_cmn_power_well_enable()
1672 tmp = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW6_CH1); in chv_dpio_cmn_power_well_enable()
1681 tmp = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW30); in chv_dpio_cmn_power_well_enable()
1755 val = vlv_dpio_read(dev_priv, pipe, reg); in assert_chv_phy_powergate()
Dintel_display.c5039 mdiv = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW3(pipe)); in vlv_crtc_clock_get()
5067 cmn_dw13 = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW13(port)); in chv_crtc_clock_get()
5068 pll_dw0 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW0(port)); in chv_crtc_clock_get()
5069 pll_dw1 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW1(port)); in chv_crtc_clock_get()
5070 pll_dw2 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW2(port)); in chv_crtc_clock_get()
5071 pll_dw3 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW3(port)); in chv_crtc_clock_get()
/Linux-v5.15/drivers/gpu/drm/i915/
Dintel_sideband.h78 u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg);
Dintel_sideband.c246 u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg) in vlv_dpio_read() function