Searched refs:vACR (Results 1 – 2 of 2) sorted by relevance
176 via1[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */ in via_init()177 via1[vACR] &= ~0x03; /* disable port A & B latches */ in via_init()230 via2[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */ in via_init()231 via2[vACR] &= ~0x03; /* disable port A & B latches */ in via_init()268 (uint) via1[vDirA], (uint) via1[vDirB], (uint) via1[vACR]); in via_debug_dump()281 (uint) via2[vACR]); in via_debug_dump()603 via1[vACR] |= 0x40; in via_init_clock()
208 #define vACR 0x1600 /* [VIA only] Auxiliary control register. */ macro
