Searched refs:triggered_crtc_reset (Results 1 – 5 of 5) sorted by relevance
219 struct crtc_trigger_info triggered_crtc_reset; member
5523 if (stream->triggered_crtc_reset.enabled) { in set_multisync_trigger_params()5524 master = stream->triggered_crtc_reset.event_source; in set_multisync_trigger_params()5525 stream->triggered_crtc_reset.event = in set_multisync_trigger_params()5528 stream->triggered_crtc_reset.delay = TRIGGER_DELAY_NEXT_PIXEL; in set_multisync_trigger_params()5538 if (stream_set[j] && stream_set[j]->triggered_crtc_reset.enabled) { in set_master_stream()5551 stream_set[j]->triggered_crtc_reset.event_source = stream_set[master_stream]; in set_master_stream()9634 new_stream->triggered_crtc_reset.enabled = in dm_update_crtc_state()10938 ->triggered_crtc_reset.enabled = in amdgpu_dm_trigger_timing_sync()
1205 !ctx->res_ctx.pipe_ctx[i].stream->triggered_crtc_reset.enabled) in enable_timing_multisync()1207 …if (ctx->res_ctx.pipe_ctx[i].stream == ctx->res_ctx.pipe_ctx[i].stream->triggered_crtc_reset.event… in enable_timing_multisync()
2497 &grouped_pipes[i]->stream->triggered_crtc_reset); in dce110_enable_per_frame_crtc_position_reset()
2194 &grouped_pipes[i]->stream->triggered_crtc_reset); in dcn10_enable_per_frame_crtc_position_reset()
