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Searched refs:tg_inst (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dce/
Ddce_hwseq.c177 unsigned int tg_inst) in dce_crtc_switch_to_clk_src() argument
180 REG_UPDATE(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
186 REG_UPDATE_2(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
190 REG_UPDATE(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
196 REG_UPDATE_2(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
200 if (REG(PHYPLL_PIXEL_RATE_CNTL[tg_inst])) in dce_crtc_switch_to_clk_src()
201 REG_UPDATE(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
205 clk_src->id, tg_inst); in dce_crtc_switch_to_clk_src()
Ddce_stream_encoder.c1506 int tg_inst, bool enable) in setup_stereo_sync() argument
1509 REG_UPDATE(DIG_FE_CNTL, DIG_STEREOSYNC_SELECT, tg_inst); in setup_stereo_sync()
1515 int tg_inst) in dig_connect_to_otg() argument
1519 REG_UPDATE(DIG_FE_CNTL, DIG_SOURCE_SELECT, tg_inst); in dig_connect_to_otg()
1525 uint32_t tg_inst = 0; in dig_source_otg() local
1528 REG_GET(DIG_FE_CNTL, DIG_SOURCE_SELECT, &tg_inst); in dig_source_otg()
1530 return tg_inst; in dig_source_otg()
Ddce_hwseq.h1165 unsigned int tg_inst);
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/virtual/
Dvirtual_stream_encoder.c93 int tg_inst) in virtual_dig_connect_to_otg() argument
98 int tg_inst, in virtual_setup_stereo_sync() argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/inc/hw/
Dstream_encoder.h199 int tg_inst,
207 int tg_inst);
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_stream_encoder.c1453 int tg_inst, bool enable) in enc1_setup_stereo_sync() argument
1456 REG_UPDATE(DIG_FE_CNTL, DIG_STEREOSYNC_SELECT, tg_inst); in enc1_setup_stereo_sync()
1462 int tg_inst) in enc1_dig_connect_to_otg() argument
1466 REG_UPDATE(DIG_FE_CNTL, DIG_SOURCE_SELECT, tg_inst); in enc1_dig_connect_to_otg()
1472 uint32_t tg_inst = 0; in enc1_dig_source_otg() local
1475 REG_GET(DIG_FE_CNTL, DIG_SOURCE_SELECT, &tg_inst); in enc1_dig_source_otg()
1477 return tg_inst; in enc1_dig_source_otg()
Ddcn10_stream_encoder.h638 int tg_inst, bool enable);
670 int tg_inst);
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/core/
Ddc_resource.c1923 unsigned int i, inst, tg_inst = 0; in acquire_resource_from_hw_enabled_state() local
1936 tg_inst = pool->stream_enc[i]->funcs->dig_source_otg( in acquire_resource_from_hw_enabled_state()
1946 if (tg_inst >= pool->timing_generator_count) in acquire_resource_from_hw_enabled_state()
1949 if (!res_ctx->pipe_ctx[tg_inst].stream) { in acquire_resource_from_hw_enabled_state()
1950 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[tg_inst]; in acquire_resource_from_hw_enabled_state()
1952 pipe_ctx->stream_res.tg = pool->timing_generators[tg_inst]; in acquire_resource_from_hw_enabled_state()
1953 pipe_ctx->plane_res.mi = pool->mis[tg_inst]; in acquire_resource_from_hw_enabled_state()
1954 pipe_ctx->plane_res.hubp = pool->hubps[tg_inst]; in acquire_resource_from_hw_enabled_state()
1955 pipe_ctx->plane_res.ipp = pool->ipps[tg_inst]; in acquire_resource_from_hw_enabled_state()
1956 pipe_ctx->plane_res.xfm = pool->transforms[tg_inst]; in acquire_resource_from_hw_enabled_state()
[all …]
Ddc.c1032 unsigned int enc_inst, tg_inst = 0; in disable_vbios_mode_if_required() local
1039 tg_inst = dc->res_pool->stream_enc[j]->funcs->dig_source_otg( in disable_vbios_mode_if_required()
1047 tg_inst, &pix_clk_100hz); in disable_vbios_mode_if_required()
1364 unsigned int i, enc_inst, tg_inst = 0; in dc_validate_seamless_boot_timing() local
1385 tg_inst = dc->res_pool->stream_enc[i]->funcs->dig_source_otg( in dc_validate_seamless_boot_timing()
1395 if (tg_inst >= dc->res_pool->timing_generator_count) in dc_validate_seamless_boot_timing()
1398 tg = dc->res_pool->timing_generators[tg_inst]; in dc_validate_seamless_boot_timing()
1451 tg_inst, &pix_clk_100hz); in dc_validate_seamless_boot_timing()
/Linux-v5.15/drivers/gpu/drm/amd/display/dmub/inc/
Ddmub_cmd.h2118 uint32_t tg_inst; member