Searched refs:tR (Results 1 – 7 of 7) sorted by relevance
180 u16 tR; member
21 read registers (tR). Required if property "gpios" is not used
21 read registers (tR). If not present then a default of 20us is used.
674 timings->tR_max = 1000000ULL * onfi->tR; in onfi_fill_sdr_interface_config()710 timings->tR_max = 1000000ULL * onfi->tR; in onfi_fill_nvddr_interface_config()
450 unsigned int tR; member2408 nfc_tmg.tR = TO_CYCLES(sdr->tWB_max, period_ns); in marvell_nfc_setup_interface()2410 nfc_tmg.tR = TO_CYCLES64(sdr->tWB_max + sdr->tR_max, in marvell_nfc_setup_interface()2412 if (nfc_tmg.tR + 3 > nfc_tmg.tCH) in marvell_nfc_setup_interface()2413 nfc_tmg.tR = nfc_tmg.tCH - 3; in marvell_nfc_setup_interface()2415 nfc_tmg.tR = 0; in marvell_nfc_setup_interface()2433 NDTR1_TR(nfc_tmg.tR); in marvell_nfc_setup_interface()
316 onfi->tR = le16_to_cpu(p->t_r); in nand_onfi_detect()
1718 tS, tR = self.dmesg[lp]['end'], self.dmesg[phase]['start']1719 tL = tR - tS1722 left = True if tR > tZero else False1908 tS = tR = False1915 if not tR and ps >= self.tResumed:1917 tR = True
