| /Linux-v5.15/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_4.c | 693 uint32_t sec_count, ded_count; in gfx_v9_4_query_utc_edc_status() local
711 sec_count = REG_GET_FIELD(data, VML2_MEM_ECC_CNTL, SEC_COUNT); in gfx_v9_4_query_utc_edc_status()
712 if (sec_count) { in gfx_v9_4_query_utc_edc_status()
715 vml2_mems[i], sec_count); in gfx_v9_4_query_utc_edc_status()
716 err_data->ce_count += sec_count; in gfx_v9_4_query_utc_edc_status()
732 sec_count = REG_GET_FIELD(data, VML2_WALKER_MEM_ECC_CNTL, in gfx_v9_4_query_utc_edc_status()
734 if (sec_count) { in gfx_v9_4_query_utc_edc_status()
737 vml2_walker_mems[i], sec_count); in gfx_v9_4_query_utc_edc_status()
738 err_data->ce_count += sec_count; in gfx_v9_4_query_utc_edc_status()
755 sec_count = REG_GET_FIELD(data, UTCL2_MEM_ECC_CNTL, SEC_COUNT); in gfx_v9_4_query_utc_edc_status()
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| D | sdma_v4_4.c | 166 uint32_t *sec_count) in sdma_v4_4_get_ras_error_count() argument
186 *sec_count += sec_cnt; in sdma_v4_4_get_ras_error_count()
196 uint32_t sec_count = 0; in sdma_v4_4_query_ras_error_count() local
205 instance, &sec_count); in sdma_v4_4_query_ras_error_count()
212 instance, &sec_count); in sdma_v4_4_query_ras_error_count()
221 err_data->ue_count += sec_count; in sdma_v4_4_query_ras_error_count()
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| D | gfx_v9_4_2.c | 1447 uint32_t value, uint32_t *sec_count, in gfx_v9_4_2_get_reg_error_count() argument
1466 *sec_count += sec_cnt; in gfx_v9_4_2_get_reg_error_count()
1484 uint32_t *sec_count, uint32_t *ded_count) in gfx_v9_4_2_query_sram_edc_count() argument
1489 if (sec_count && ded_count) { in gfx_v9_4_2_query_sram_edc_count()
1490 *sec_count = 0; in gfx_v9_4_2_query_sram_edc_count()
1503 if (!sec_count || !ded_count) { in gfx_v9_4_2_query_sram_edc_count()
1526 if (sec_count && ded_count) { in gfx_v9_4_2_query_sram_edc_count()
1527 *sec_count += sec_cnt; in gfx_v9_4_2_query_sram_edc_count()
1589 uint32_t *sec_count, in gfx_v9_4_2_query_utc_edc_count() argument
1597 if (sec_count && ded_count) { in gfx_v9_4_2_query_utc_edc_count()
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| D | mmhub_v1_0.c | 708 uint32_t value, uint32_t *sec_count, uint32_t *ded_count) in mmhub_v1_0_get_ras_error_count() argument
725 *sec_count += sec_cnt; in mmhub_v1_0_get_ras_error_count()
747 uint32_t sec_count = 0, ded_count = 0; in mmhub_v1_0_query_ras_error_count() local
760 reg_value, &sec_count, &ded_count); in mmhub_v1_0_query_ras_error_count()
763 err_data->ce_count += sec_count; in mmhub_v1_0_query_ras_error_count()
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| D | mmhub_v1_7.c | 1210 uint32_t *sec_count, in mmhub_v1_7_get_ras_error_count() argument
1227 *sec_count += sec_cnt; in mmhub_v1_7_get_ras_error_count()
1248 uint32_t sec_count = 0, ded_count = 0; in mmhub_v1_7_query_ras_error_count() local
1260 reg_value, &sec_count, &ded_count); in mmhub_v1_7_query_ras_error_count()
1263 err_data->ce_count += sec_count; in mmhub_v1_7_query_ras_error_count()
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| D | gfx_v9_0.c | 6530 uint32_t sec_count, ded_count; in gfx_v9_0_query_utc_edc_status() local
6545 sec_count = REG_GET_FIELD(data, VM_L2_MEM_ECC_CNT, SEC_COUNT); in gfx_v9_0_query_utc_edc_status()
6546 if (sec_count) { in gfx_v9_0_query_utc_edc_status()
6548 "SEC %d\n", i, vml2_mems[i], sec_count); in gfx_v9_0_query_utc_edc_status()
6549 err_data->ce_count += sec_count; in gfx_v9_0_query_utc_edc_status()
6564 sec_count = REG_GET_FIELD(data, VM_L2_WALKER_MEM_ECC_CNT, in gfx_v9_0_query_utc_edc_status()
6566 if (sec_count) { in gfx_v9_0_query_utc_edc_status()
6568 "SEC %d\n", i, vml2_walker_mems[i], sec_count); in gfx_v9_0_query_utc_edc_status()
6569 err_data->ce_count += sec_count; in gfx_v9_0_query_utc_edc_status()
6585 sec_count = (data & 0x00006000L) >> 0xd; in gfx_v9_0_query_utc_edc_status()
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| D | mmhub_v9_4.c | 1558 uint32_t *sec_count, in mmhub_v9_4_get_ras_error_count() argument
1575 *sec_count += sec_cnt; in mmhub_v9_4_get_ras_error_count()
1596 uint32_t sec_count = 0, ded_count = 0; in mmhub_v9_4_query_ras_error_count() local
1608 reg_value, &sec_count, &ded_count); in mmhub_v9_4_query_ras_error_count()
1611 err_data->ce_count += sec_count; in mmhub_v9_4_query_ras_error_count()
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| D | sdma_v4_0.c | 2725 uint32_t *sec_count) in sdma_v4_0_get_ras_error_count() argument
2742 *sec_count += sec_cnt; in sdma_v4_0_get_ras_error_count()
2751 uint32_t sec_count = 0; in sdma_v4_0_query_ras_error_count() local
2758 instance, &sec_count); in sdma_v4_0_query_ras_error_count()
2761 err_data->ce_count += sec_count; in sdma_v4_0_query_ras_error_count()
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| /Linux-v5.15/drivers/gpu/drm/msm/adreno/ |
| D | a6xx_gmu.c | 1232 size_t pri_count, sec_count; in a6xx_gmu_rpmh_arc_votes_init() local
1245 sec = cmd_db_read_aux_data("mx.lvl", &sec_count); in a6xx_gmu_rpmh_arc_votes_init()
1249 sec_count >>= 1; in a6xx_gmu_rpmh_arc_votes_init()
1250 if (!sec_count) in a6xx_gmu_rpmh_arc_votes_init()
1282 for (j = 0; j < sec_count; j++) { in a6xx_gmu_rpmh_arc_votes_init()
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