Home
last modified time | relevance | path

Searched refs:regMP1_SMN_IH_SW_INT_CTRL (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dsmu_v13_0.c1204 val = RREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL); in smu_v13_0_set_irq_state()
1206 WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val); in smu_v13_0_set_irq_state()
1237 val = RREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL); in smu_v13_0_set_irq_state()
1239 WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val); in smu_v13_0_set_irq_state()
1303 data = RREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL); in smu_v13_0_irq_process()
1305 WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, data); in smu_v13_0_irq_process()
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/mp/
Dmp_13_0_2_offset.h339 #define regMP1_SMN_IH_SW_INT_CTRL macro