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Searched refs:rFPGA0_XCD_RFInterfaceSW (Results 1 – 12 of 12) sorted by relevance

/Linux-v5.15/drivers/staging/rtl8192u/
Dr819xU_phyreg.h29 #define rFPGA0_XCD_RFInterfaceSW 0x874 macro
Dr819xU_phy.c553 priv->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
555 priv->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
/Linux-v5.15/drivers/staging/r8188eu/hal/
Drtl8188e_phycfg.c395 …pHalData->PHYRegDef[RF_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;/* 16 LSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()
396 …pHalData->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;/* 16 MSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()
Dodm.c1813 Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord); in ODM_SingleDualAntennaDetection()
1848 ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000); in ODM_SingleDualAntennaDetection()
1907 ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874); in ODM_SingleDualAntennaDetection()
DHalPhyRf_8188e.c880 rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, in phy_IQCalibrate_8188E()
913 ODM_SetBBReg(dm_odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); in phy_IQCalibrate_8188E()
/Linux-v5.15/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h74 #define rFPGA0_XCD_RFInterfaceSW 0x874 macro
Dr8192E_phy.c384 priv->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW; in _rtl92e_init_bb_rf_reg_def()
385 priv->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW; in _rtl92e_init_bb_rf_reg_def()
/Linux-v5.15/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h117 #define rFPGA0_XCD_RFInterfaceSW 0x874 macro
/Linux-v5.15/drivers/staging/r8188eu/include/
DHal8188EPhyReg.h82 #define rFPGA0_XCD_RFInterfaceSW 0x874 macro
Drtw_mp_phy_regdef.h124 #define rFPGA0_XCD_RFInterfaceSW 0x874 macro
/Linux-v5.15/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h128 #define rFPGA0_XCD_RFInterfaceSW 0x874 macro
/Linux-v5.15/drivers/staging/rtl8723bs/hal/
DHalPhyRf_8723B.c1358 rFPGA0_XCD_RFInterfaceSW, in phy_IQCalibrate_8723B()
1397 PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); in phy_IQCalibrate_8723B()