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Searched refs:rFPGA0_XA_RFInterfaceOE (Results 1 – 15 of 15) sorted by relevance

/Linux-v5.15/drivers/staging/rtl8192u/
Dr819xU_phyreg.h24 #define rFPGA0_XA_RFInterfaceOE 0x860 macro
Dr819xU_phy.c569 priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; in rtl8192_InitBBRFRegDef()
579 priv->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; in rtl8192_InitBBRFRegDef()
1075 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT(4), in rtl8192_SetRFPowerState()
1100 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT(4), in rtl8192_SetRFPowerState()
/Linux-v5.15/drivers/staging/r8188eu/hal/
Dodm.c1805 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); /* change to Antenna A */ in ODM_SingleDualAntennaDetection()
1880 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); /* change to Antenna B */ in ODM_SingleDualAntennaDetection()
1890 …ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, 0); /* change to Ant A and B all open case… in ODM_SingleDualAntennaDetection()
1904 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A); in ODM_SingleDualAntennaDetection()
1947 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); in ODM_SingleDualAntennaDetection()
1951 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A); in ODM_SingleDualAntennaDetection()
DHalPhyRf_8188e.c881 rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, in phy_IQCalibrate_8188E()
917 ODM_SetBBReg(dm_odm, rFPGA0_XA_RFInterfaceOE, BIT(10), 0x00); in phy_IQCalibrate_8188E()
1247 ODM_SetBBReg(dm_odm, rFPGA0_XA_RFInterfaceOE, BIT(8) | BIT(9), 0x2); /* Main */ in phy_setrfpathswitch_8188e()
1249 ODM_SetBBReg(dm_odm, rFPGA0_XA_RFInterfaceOE, BIT(8) | BIT(9), 0x1); /* Aux */ in phy_setrfpathswitch_8188e()
Drtl8188e_phycfg.c405 …pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()
409 …pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()
Drtl8188e_mp.c429 PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT(10), 0); in Hal_SetAntenna()
Dusb_halinit.c642 if (PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A) in _InitAntenna_Selection()
/Linux-v5.15/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c315 …pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()
319 …pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()
DHalPhyRf_8723B.c1362 rFPGA0_XA_RFInterfaceOE, in phy_IQCalibrate_8723B()
/Linux-v5.15/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phy.c392 priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; in _rtl92e_init_bb_rf_reg_def()
397 priv->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; in _rtl92e_init_bb_rf_reg_def()
1396 rtl92e_set_bb_reg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0); in rtl92e_set_rf_off()
1455 rtl92e_set_bb_reg(dev, rFPGA0_XA_RFInterfaceOE, in _rtl92e_set_rf_power_state()
Dr8192E_phyreg.h69 #define rFPGA0_XA_RFInterfaceOE 0x860 macro
/Linux-v5.15/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h112 #define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ macro
/Linux-v5.15/drivers/staging/r8188eu/include/
DHal8188EPhyReg.h78 #define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ macro
Drtw_mp_phy_regdef.h118 #define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ macro
/Linux-v5.15/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h122 #define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ macro