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Searched refs:rFPGA0_XA_HSSIParameter1 (Results 1 – 12 of 12) sorted by relevance

/Linux-v5.15/drivers/staging/r8188eu/hal/
Drtl8188e_mp.c566 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); in Hal_SetSingleCarrierTx()
581 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); in Hal_SetSingleCarrierTx()
636 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); in Hal_SetSingleToneTx()
664 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); in Hal_SetSingleToneTx()
692 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); in Hal_SetCarrierSuppressionTx()
706 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); in Hal_SetCarrierSuppressionTx()
731 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); in Hal_SetCCKContinuousTx()
742 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); in Hal_SetCCKContinuousTx()
768 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); in Hal_SetOFDMContinuousTx()
782 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); in Hal_SetOFDMContinuousTx()
Drtl8188e_phycfg.c181 RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT(8)); in phy_RFSerialRead()
429 …pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; /* wire control parameter1… in phy_InitBBRFRegisterDefinition()
DHalPhyRf_8188e.c763 ODM_SetBBReg(dm_odm, rFPGA0_XA_HSSIParameter1, bMaskDWord, mode); in _PHY_PIModeSwitch()
902 dm_odm->RFCalibrateInfo.bRfPiEnable = (u8)ODM_GetBBReg(dm_odm, rFPGA0_XA_HSSIParameter1, BIT(8)); in phy_IQCalibrate_8188E()
/Linux-v5.15/drivers/staging/rtl8192u/
Dr819xU_phyreg.h10 #define rFPGA0_XA_HSSIParameter1 0x820 macro
Dr819xU_phy.c608 priv->PHYRegDef[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; in rtl8192_InitBBRFRegDef()
/Linux-v5.15/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h53 #define rFPGA0_XA_HSSIParameter1 0x820 macro
Dr8192E_phy.c417 priv->PHYRegDef[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; in _rtl92e_init_bb_rf_reg_def()
/Linux-v5.15/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h93 #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ macro
/Linux-v5.15/drivers/staging/r8188eu/include/
DHal8188EPhyReg.h64 #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ macro
Drtw_mp_phy_regdef.h99 #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ macro
/Linux-v5.15/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h102 #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ macro
/Linux-v5.15/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c133 RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1|MaskforPhySet, BIT8); in phy_RFSerialRead_8723B()