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Searched refs:pstate_table (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/pm/swsmu/smu13/
Daldebaran_ppt.c499 struct smu_umd_pstate_table *pstate_table = in aldebaran_populate_umd_state_clk() local
500 &smu->pstate_table; in aldebaran_populate_umd_state_clk()
502 pstate_table->gfxclk_pstate.min = gfx_table->min; in aldebaran_populate_umd_state_clk()
503 pstate_table->gfxclk_pstate.peak = gfx_table->max; in aldebaran_populate_umd_state_clk()
504 pstate_table->gfxclk_pstate.curr.min = gfx_table->min; in aldebaran_populate_umd_state_clk()
505 pstate_table->gfxclk_pstate.curr.max = gfx_table->max; in aldebaran_populate_umd_state_clk()
507 pstate_table->uclk_pstate.min = mem_table->min; in aldebaran_populate_umd_state_clk()
508 pstate_table->uclk_pstate.peak = mem_table->max; in aldebaran_populate_umd_state_clk()
509 pstate_table->uclk_pstate.curr.min = mem_table->min; in aldebaran_populate_umd_state_clk()
510 pstate_table->uclk_pstate.curr.max = mem_table->max; in aldebaran_populate_umd_state_clk()
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Dsmu_v13_0.c1630 struct smu_umd_pstate_table *pstate_table = in smu_v13_0_set_performance_level() local
1631 &smu->pstate_table; in smu_v13_0_set_performance_level()
1658 sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard; in smu_v13_0_set_performance_level()
1659 mclk_min = mclk_max = pstate_table->uclk_pstate.standard; in smu_v13_0_set_performance_level()
1660 socclk_min = socclk_max = pstate_table->socclk_pstate.standard; in smu_v13_0_set_performance_level()
1663 sclk_min = sclk_max = pstate_table->gfxclk_pstate.min; in smu_v13_0_set_performance_level()
1666 mclk_min = mclk_max = pstate_table->uclk_pstate.min; in smu_v13_0_set_performance_level()
1669 sclk_min = sclk_max = pstate_table->gfxclk_pstate.peak; in smu_v13_0_set_performance_level()
1670 mclk_min = mclk_max = pstate_table->uclk_pstate.peak; in smu_v13_0_set_performance_level()
1671 socclk_min = socclk_max = pstate_table->socclk_pstate.peak; in smu_v13_0_set_performance_level()
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/Linux-v5.15/drivers/gpu/drm/amd/pm/swsmu/smu11/
Darcturus_ppt.c537 struct smu_umd_pstate_table *pstate_table = in arcturus_populate_umd_state_clk() local
538 &smu->pstate_table; in arcturus_populate_umd_state_clk()
540 pstate_table->gfxclk_pstate.min = gfx_table->min; in arcturus_populate_umd_state_clk()
541 pstate_table->gfxclk_pstate.peak = gfx_table->max; in arcturus_populate_umd_state_clk()
543 pstate_table->uclk_pstate.min = mem_table->min; in arcturus_populate_umd_state_clk()
544 pstate_table->uclk_pstate.peak = mem_table->max; in arcturus_populate_umd_state_clk()
546 pstate_table->socclk_pstate.min = soc_table->min; in arcturus_populate_umd_state_clk()
547 pstate_table->socclk_pstate.peak = soc_table->max; in arcturus_populate_umd_state_clk()
552 pstate_table->gfxclk_pstate.standard = in arcturus_populate_umd_state_clk()
554 pstate_table->uclk_pstate.standard = in arcturus_populate_umd_state_clk()
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Dnavi10_ppt.c1506 struct smu_umd_pstate_table *pstate_table = in navi10_populate_umd_state_clk() local
1507 &smu->pstate_table; in navi10_populate_umd_state_clk()
1511 pstate_table->gfxclk_pstate.min = gfx_table->min; in navi10_populate_umd_state_clk()
1558 pstate_table->gfxclk_pstate.peak = sclk_freq; in navi10_populate_umd_state_clk()
1560 pstate_table->uclk_pstate.min = mem_table->min; in navi10_populate_umd_state_clk()
1561 pstate_table->uclk_pstate.peak = mem_table->max; in navi10_populate_umd_state_clk()
1563 pstate_table->socclk_pstate.min = soc_table->min; in navi10_populate_umd_state_clk()
1564 pstate_table->socclk_pstate.peak = soc_table->max; in navi10_populate_umd_state_clk()
1569 pstate_table->gfxclk_pstate.standard = in navi10_populate_umd_state_clk()
1571 pstate_table->uclk_pstate.standard = in navi10_populate_umd_state_clk()
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Dsmu_v11_0.c1879 struct smu_umd_pstate_table *pstate_table = in smu_v11_0_set_performance_level() local
1880 &smu->pstate_table; in smu_v11_0_set_performance_level()
1907 sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard; in smu_v11_0_set_performance_level()
1908 mclk_min = mclk_max = pstate_table->uclk_pstate.standard; in smu_v11_0_set_performance_level()
1909 socclk_min = socclk_max = pstate_table->socclk_pstate.standard; in smu_v11_0_set_performance_level()
1912 sclk_min = sclk_max = pstate_table->gfxclk_pstate.min; in smu_v11_0_set_performance_level()
1915 mclk_min = mclk_max = pstate_table->uclk_pstate.min; in smu_v11_0_set_performance_level()
1918 sclk_min = sclk_max = pstate_table->gfxclk_pstate.peak; in smu_v11_0_set_performance_level()
1919 mclk_min = mclk_max = pstate_table->uclk_pstate.peak; in smu_v11_0_set_performance_level()
1920 socclk_min = socclk_max = pstate_table->socclk_pstate.peak; in smu_v11_0_set_performance_level()
Dsienna_cichlid_ppt.c1279 struct smu_umd_pstate_table *pstate_table = in sienna_cichlid_populate_umd_state_clk() local
1280 &smu->pstate_table; in sienna_cichlid_populate_umd_state_clk()
1282 pstate_table->gfxclk_pstate.min = gfx_table->min; in sienna_cichlid_populate_umd_state_clk()
1283 pstate_table->gfxclk_pstate.peak = gfx_table->max; in sienna_cichlid_populate_umd_state_clk()
1285 pstate_table->gfxclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_GFXCLK; in sienna_cichlid_populate_umd_state_clk()
1287 pstate_table->uclk_pstate.min = mem_table->min; in sienna_cichlid_populate_umd_state_clk()
1288 pstate_table->uclk_pstate.peak = mem_table->max; in sienna_cichlid_populate_umd_state_clk()
1290 pstate_table->uclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_MEMCLK; in sienna_cichlid_populate_umd_state_clk()
1292 pstate_table->socclk_pstate.min = soc_table->min; in sienna_cichlid_populate_umd_state_clk()
1293 pstate_table->socclk_pstate.peak = soc_table->max; in sienna_cichlid_populate_umd_state_clk()
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/Linux-v5.15/drivers/gpu/drm/amd/pm/swsmu/
Damdgpu_smu.c2429 struct smu_umd_pstate_table *pstate_table = in smu_read_sensor() local
2430 &smu->pstate_table; in smu_read_sensor()
2451 *((uint32_t *)data) = pstate_table->gfxclk_pstate.standard * 100; in smu_read_sensor()
2455 *((uint32_t *)data) = pstate_table->uclk_pstate.standard * 100; in smu_read_sensor()
/Linux-v5.15/drivers/gpu/drm/amd/pm/inc/
Damdgpu_smu.h503 struct smu_umd_pstate_table pstate_table; member