Searched refs:psr_context (Results 1 – 8 of 8) sorted by relevance
175 struct psr_context *psr_context) in dce_dmcu_setup_psr() argument187 psr_context->psrExitLinkTrainingRequired); in dce_dmcu_setup_psr()197 switch (psr_context->controllerId) { in dce_dmcu_setup_psr()235 psr_context->sdpTransmitLineNumDeadline); in dce_dmcu_setup_psr()244 masterCmdData1.bits.timehyst_frames = psr_context->timehyst_frames; in dce_dmcu_setup_psr()245 masterCmdData1.bits.hyst_lines = psr_context->hyst_lines; in dce_dmcu_setup_psr()247 psr_context->rfb_update_auto_en; in dce_dmcu_setup_psr()248 masterCmdData1.bits.dp_port_num = psr_context->transmitterId; in dce_dmcu_setup_psr()249 masterCmdData1.bits.dcp_sel = psr_context->controllerId; in dce_dmcu_setup_psr()250 masterCmdData1.bits.phy_type = psr_context->phyType; in dce_dmcu_setup_psr()[all …]
233 struct psr_context *psr_context, in dmub_psr_copy_settings() argument263 psr_context->psrExitLinkTrainingRequired); in dmub_psr_copy_settings()267 psr_context->sdpTransmitLineNumDeadline); in dmub_psr_copy_settings()275 copy_settings_data->dpphy_inst = psr_context->transmitterId; in dmub_psr_copy_settings()276 copy_settings_data->aux_inst = psr_context->channel; in dmub_psr_copy_settings()277 copy_settings_data->digfe_inst = psr_context->engineId; in dmub_psr_copy_settings()278 copy_settings_data->digbe_inst = psr_context->transmitterId; in dmub_psr_copy_settings()296 copy_settings_data->psr_level = psr_context->psr_level.u32all; in dmub_psr_copy_settings()297 copy_settings_data->smu_optimizations_en = psr_context->allow_smu_optimizations; in dmub_psr_copy_settings()298 copy_settings_data->multi_disp_optimizations_en = psr_context->allow_multi_disp_optimizations; in dmub_psr_copy_settings()[all …]
39 struct psr_context *psr_context, uint8_t panel_inst);
69 struct psr_context psr_context = {0}; in amdgpu_dm_link_setup_psr() local86 ret = dc_link_setup_psr(link, stream, &psr_config, &psr_context); in amdgpu_dm_link_setup_psr()
82 struct psr_context *psr_context);
2752 struct psr_context *psr_context) in dc_link_setup_psr() argument2762 psr_context->controllerId = CONTROLLER_ID_UNDEFINED; in dc_link_setup_psr()2806 psr_context->channel = link->ddc->ddc_pin->hw_info.ddc_channel; in dc_link_setup_psr()2807 psr_context->transmitterId = link->link_enc->transmitter; in dc_link_setup_psr()2808 psr_context->engineId = link->link_enc->preferred_engine; in dc_link_setup_psr()2816 psr_context->controllerId = in dc_link_setup_psr()2824 psr_context->phyType = PHY_TYPE_UNIPHY; in dc_link_setup_psr()2826 psr_context->smuPhyId = in dc_link_setup_psr()2829 psr_context->crtcTimingVerticalTotal = stream->timing.v_total; in dc_link_setup_psr()2830 psr_context->vsync_rate_hz = div64_u64(div64_u64((stream-> in dc_link_setup_psr()[all …]
270 struct psr_context *psr_context);
697 struct psr_context { struct
