| /Linux-v5.15/drivers/clk/qcom/ |
| D | clk-alpha-pll.c | 1307 if (pll->post_div_table[i].val == val) { in clk_alpha_pll_postdiv_fabia_recalc_rate()
1308 div = pll->post_div_table[i].div; in clk_alpha_pll_postdiv_fabia_recalc_rate()
1329 if (pll->post_div_table[i].val == val) { in clk_trion_pll_postdiv_recalc_rate()
1330 div = pll->post_div_table[i].div; in clk_trion_pll_postdiv_recalc_rate()
1344 return divider_round_rate(hw, rate, prate, pll->post_div_table, in clk_trion_pll_postdiv_round_rate()
1358 if (pll->post_div_table[i].div == div) { in clk_trion_pll_postdiv_set_rate()
1359 val = pll->post_div_table[i].val; in clk_trion_pll_postdiv_set_rate()
1381 return divider_round_rate(hw, rate, prate, pll->post_div_table, in clk_alpha_pll_postdiv_fabia_round_rate()
1404 if (pll->post_div_table[i].div == div) { in clk_alpha_pll_postdiv_fabia_set_rate()
1405 val = pll->post_div_table[i].val; in clk_alpha_pll_postdiv_fabia_set_rate()
[all …]
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| D | clk-alpha-pll.h | 97 const struct clk_div_table *post_div_table; member
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| D | gcc-sm6115.c | 83 .post_div_table = post_div_table_gpll0_out_aux2,
115 .post_div_table = post_div_table_gpll0_out_main,
163 .post_div_table = post_div_table_gpll10_out_main,
215 .post_div_table = post_div_table_gpll11_out_main,
274 .post_div_table = post_div_table_gpll4_out_main,
313 .post_div_table = post_div_table_gpll6_out_main,
352 .post_div_table = post_div_table_gpll7_out_main,
407 .post_div_table = post_div_table_gpll8_out_main,
457 .post_div_table = post_div_table_gpll9_out_main,
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| D | mmcc-msm8998.c | 93 .post_div_table = post_div_table_fabia_even,
126 .post_div_table = post_div_table_fabia_even,
155 .post_div_table = post_div_table_fabia_even,
184 .post_div_table = post_div_table_fabia_even,
213 .post_div_table = post_div_table_fabia_even,
242 .post_div_table = post_div_table_fabia_even,
271 .post_div_table = post_div_table_fabia_even,
300 .post_div_table = post_div_table_fabia_even,
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| D | camcc-sdm845.c | 69 .post_div_table = post_div_table_fabia_even,
97 .post_div_table = post_div_table_fabia_even,
125 .post_div_table = post_div_table_fabia_even,
153 .post_div_table = post_div_table_fabia_even,
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| D | camcc-sm8250.c | 79 .post_div_table = post_div_table_cam_cc_pll0_out_even,
102 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
153 .post_div_table = post_div_table_cam_cc_pll1_out_even,
204 .post_div_table = post_div_table_cam_cc_pll2_out_main,
255 .post_div_table = post_div_table_cam_cc_pll3_out_even,
306 .post_div_table = post_div_table_cam_cc_pll4_out_even,
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| D | gpucc-msm8998.c | 82 .post_div_table = post_div_table_fabia_even,
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| D | lpasscorecc-sc7180.c | 89 .post_div_table = post_div_table_lpass_lpaaudio_dig_pll_out_odd,
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| D | dispcc-sc7180.c | 60 .post_div_table = post_div_table_disp_cc_pll0_out_even,
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| D | gcc-sdx55.c | 68 .post_div_table = post_div_table_lucid_even,
104 .post_div_table = post_div_table_lucid_even,
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| D | gcc-sm6350.c | 58 .post_div_table = post_div_table_gpll0_out_even,
80 .post_div_table = post_div_table_gpll0_out_odd,
119 .post_div_table = post_div_table_gpll6_out_even,
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| D | gcc-sc7280.c | 67 .post_div_table = post_div_table_gcc_gpll0_out_even,
89 .post_div_table = post_div_table_gcc_gpll0_out_odd,
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| D | camcc-sc7180.c | 144 .post_div_table = post_div_table_cam_cc_pll2_out_aux,
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| D | gcc-sc7180.c | 62 .post_div_table = post_div_table_gpll0_out_even,
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| D | gcc-sdm845.c | 82 .post_div_table = post_div_table_fabia_even,
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| D | gcc-sm8250.c | 60 .post_div_table = post_div_table_gpll0_out_even,
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| D | gcc-sm8350.c | 67 .post_div_table = post_div_table_gcc_gpll0_out_even,
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| D | gcc-sm8150.c | 66 .post_div_table = post_div_table_trion_even,
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| D | gcc-sc8180x.c | 77 .post_div_table = post_div_table_trion_even,
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| /Linux-v5.15/drivers/clk/imx/ |
| D | clk-imx6sll.c | 59 static const struct clk_div_table post_div_table[] = { variable
176 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
180 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
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| D | clk-imx6sl.c | 80 static const struct clk_div_table post_div_table[] = { variable
267 …v", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock… in imx6sl_clocks_init()
269 …v", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock… in imx6sl_clocks_init()
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| D | clk-imx6q.c | 103 static struct clk_div_table post_div_table[] = { variable
462 post_div_table[1].div = 1; in imx6q_clocks_init()
463 post_div_table[2].div = 1; in imx6q_clocks_init()
593 …post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock… in imx6q_clocks_init()
598 …post_div", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock… in imx6q_clocks_init()
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| D | clk-imx6ul.c | 82 static const struct clk_div_table post_div_table[] = { variable
219 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6ul_clocks_init()
223 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6ul_clocks_init()
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| D | clk-imx6sx.c | 96 static const struct clk_div_table post_div_table[] = { variable
248 CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sx_clocks_init()
252 CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sx_clocks_init()
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| D | clk-imx7d.c | 36 static const struct clk_div_table post_div_table[] = { variable
434 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xf0, 22, 2, 0, post_div_table, &imx_ccm_lock); in imx7d_clocks_init()
438 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x130, 22, 2, 0, post_div_table, &imx_ccm_lock); in imx7d_clocks_init()
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