Searched refs:pll_in_use (Results 1 – 6 of 6) sorted by relevance
1737 u32 pll_in_use = 0; in radeon_get_pll_use_mask() local1745 pll_in_use |= (1 << test_radeon_crtc->pll_id); in radeon_get_pll_use_mask()1747 return pll_in_use; in radeon_get_pll_use_mask()1878 u32 pll_in_use; in radeon_atom_pick_pll() local1902 pll_in_use = radeon_get_pll_use_mask(crtc); in radeon_atom_pick_pll()1903 if (!(pll_in_use & (1 << ATOM_PPLL2))) in radeon_atom_pick_pll()1905 if (!(pll_in_use & (1 << ATOM_PPLL1))) in radeon_atom_pick_pll()1911 pll_in_use = radeon_get_pll_use_mask(crtc); in radeon_atom_pick_pll()1912 if (!(pll_in_use & (1 << ATOM_PPLL2))) in radeon_atom_pick_pll()1914 if (!(pll_in_use & (1 << ATOM_PPLL1))) in radeon_atom_pick_pll()[all …]
272 u32 pll_in_use = 0; in amdgpu_pll_get_use_mask() local280 pll_in_use |= (1 << test_amdgpu_crtc->pll_id); in amdgpu_pll_get_use_mask()282 return pll_in_use; in amdgpu_pll_get_use_mask()
2144 u32 pll_in_use; in dce_v8_0_pick_pll() local2167 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v8_0_pick_pll()2168 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v8_0_pick_pll()2170 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v8_0_pick_pll()2176 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v8_0_pick_pll()2177 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v8_0_pick_pll()2179 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v8_0_pick_pll()2181 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v8_0_pick_pll()
2283 u32 pll_in_use; in dce_v11_0_pick_pll() local2337 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v11_0_pick_pll()2339 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v11_0_pick_pll()2341 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v11_0_pick_pll()2346 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v11_0_pick_pll()2348 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v11_0_pick_pll()2350 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v11_0_pick_pll()
2250 u32 pll_in_use; in dce_v10_0_pick_pll() local2271 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v10_0_pick_pll()2272 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v10_0_pick_pll()2274 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v10_0_pick_pll()2276 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v10_0_pick_pll()
2151 u32 pll_in_use; in dce_v6_0_pick_pll() local2168 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v6_0_pick_pll()2169 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v6_0_pick_pll()2171 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v6_0_pick_pll()
