Searched refs:pcw (Results 1 – 3 of 3) sorted by relevance
| /Linux-v5.15/drivers/clk/mediatek/ |
| D | clk-pll.c | 64 u32 pcw, int postdiv) in __mtk_pll_recalc_rate() argument
77 vco = (u64)fin * pcw; in __mtk_pll_recalc_rate()
116 static void mtk_pll_set_rate_regs(struct mtk_clk_pll *pll, u32 pcw, in mtk_pll_set_rate_regs() argument
138 val |= pcw << pll->data->pcw_shift; in mtk_pll_set_rate_regs()
160 static void mtk_pll_calc_values(struct mtk_clk_pll *pll, u32 *pcw, u32 *postdiv, in mtk_pll_calc_values() argument
194 *pcw = (u32)_pcw; in mtk_pll_calc_values()
201 u32 pcw = 0; in mtk_pll_set_rate() local
204 mtk_pll_calc_values(pll, &pcw, &postdiv, rate, parent_rate); in mtk_pll_set_rate()
205 mtk_pll_set_rate_regs(pll, pcw, postdiv); in mtk_pll_set_rate()
215 u32 pcw; in mtk_pll_recalc_rate() local
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| /Linux-v5.15/drivers/phy/mediatek/ |
| D | phy-mtk-mipi-dsi-mt8183.c | 50 u64 pcw; in mtk_mipi_tx_pll_enable() local
79 pcw = div_u64(((u64)mipi_tx->data_rate * txdiv) << 24, 26000000); in mtk_mipi_tx_pll_enable()
80 writel(pcw, mipi_tx->regs + MIPITX_PLL_CON0); in mtk_mipi_tx_pll_enable()
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| D | phy-mtk-mipi-dsi-mt8173.c | 120 u64 pcw; in mtk_mipi_tx_pll_prepare() local
185 pcw = div_u64(((u64)mipi_tx->data_rate * 2 * txdiv) << 24, in mtk_mipi_tx_pll_prepare()
187 writel(pcw, mipi_tx->regs + MIPITX_DSI_PLL_CON2); in mtk_mipi_tx_pll_prepare()
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