| /Linux-v5.15/drivers/pci/controller/dwc/ |
| D | pcie-tegra194.c | 301 static inline void appl_writel(struct tegra_pcie_dw *pcie, const u32 value, in appl_writel() argument
304 writel_relaxed(value, pcie->appl_base + reg); in appl_writel()
307 static inline u32 appl_readl(struct tegra_pcie_dw *pcie, const u32 reg) in appl_readl() argument
309 return readl_relaxed(pcie->appl_base + reg); in appl_readl()
319 struct tegra_pcie_dw *pcie = to_tegra_pcie(pci); in apply_bad_link_workaround() local
328 val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA); in apply_bad_link_workaround()
332 if (pcie->init_link_width > current_link_width) { in apply_bad_link_workaround()
334 val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + in apply_bad_link_workaround()
338 dw_pcie_writew_dbi(pci, pcie->pcie_cap_base + in apply_bad_link_workaround()
341 val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + in apply_bad_link_workaround()
[all …]
|
| D | pcie-visconti.c | 97 static void visconti_ulreg_writel(struct visconti_pcie *pcie, u32 val, u32 reg) in visconti_ulreg_writel() argument
99 writel_relaxed(val, pcie->ulreg_base + reg); in visconti_ulreg_writel()
102 static u32 visconti_ulreg_readl(struct visconti_pcie *pcie, u32 reg) in visconti_ulreg_readl() argument
104 return readl_relaxed(pcie->ulreg_base + reg); in visconti_ulreg_readl()
108 static void visconti_smu_writel(struct visconti_pcie *pcie, u32 val, u32 reg) in visconti_smu_writel() argument
110 writel_relaxed(val, pcie->smu_base + reg); in visconti_smu_writel()
114 static void visconti_mpu_writel(struct visconti_pcie *pcie, u32 val, u32 reg) in visconti_mpu_writel() argument
116 writel_relaxed(val, pcie->mpu_base + reg); in visconti_mpu_writel()
119 static u32 visconti_mpu_readl(struct visconti_pcie *pcie, u32 reg) in visconti_mpu_readl() argument
121 return readl_relaxed(pcie->mpu_base + reg); in visconti_mpu_readl()
[all …]
|
| D | pcie-keembay.c | 72 static void keembay_ep_reset_assert(struct keembay_pcie *pcie) in keembay_ep_reset_assert() argument
74 gpiod_set_value_cansleep(pcie->reset, 1); in keembay_ep_reset_assert()
78 static void keembay_ep_reset_deassert(struct keembay_pcie *pcie) in keembay_ep_reset_deassert() argument
88 gpiod_set_value_cansleep(pcie->reset, 0); in keembay_ep_reset_deassert()
92 static void keembay_pcie_ltssm_set(struct keembay_pcie *pcie, bool enable) in keembay_pcie_ltssm_set() argument
96 val = readl(pcie->apb_base + PCIE_REGS_PCIE_APP_CNTRL); in keembay_pcie_ltssm_set()
101 writel(val, pcie->apb_base + PCIE_REGS_PCIE_APP_CNTRL); in keembay_pcie_ltssm_set()
106 struct keembay_pcie *pcie = dev_get_drvdata(pci->dev); in keembay_pcie_link_up() local
109 val = readl(pcie->apb_base + PCIE_REGS_PCIE_SII_PM_STATE); in keembay_pcie_link_up()
116 struct keembay_pcie *pcie = dev_get_drvdata(pci->dev); in keembay_pcie_start_link() local
[all …]
|
| D | pci-layerscape.c | 56 static bool ls_pcie_is_bridge(struct ls_pcie *pcie) in ls_pcie_is_bridge() argument
58 struct dw_pcie *pci = pcie->pci; in ls_pcie_is_bridge()
68 static void ls_pcie_clear_multifunction(struct ls_pcie *pcie) in ls_pcie_clear_multifunction() argument
70 struct dw_pcie *pci = pcie->pci; in ls_pcie_clear_multifunction()
76 static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie) in ls_pcie_drop_msg_tlp() argument
79 struct dw_pcie *pci = pcie->pci; in ls_pcie_drop_msg_tlp()
89 struct ls_pcie *pcie = to_ls_pcie(pci); in ls1021_pcie_link_up() local
91 if (!pcie->scfg) in ls1021_pcie_link_up()
94 regmap_read(pcie->scfg, SCFG_PEXMSCPORTSR(pcie->index), &state); in ls1021_pcie_link_up()
105 struct ls_pcie *pcie = to_ls_pcie(pci); in ls_pcie_link_up() local
[all …]
|
| D | Makefile | 2 obj-$(CONFIG_PCIE_DW) += pcie-designware.o
3 obj-$(CONFIG_PCIE_DW_HOST) += pcie-designware-host.o
4 obj-$(CONFIG_PCIE_DW_EP) += pcie-designware-ep.o
5 obj-$(CONFIG_PCIE_DW_PLAT) += pcie-designware-plat.o
8 obj-$(CONFIG_PCIE_FU740) += pcie-fu740.o
10 obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o
14 obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o
15 obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o
16 obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o
17 obj-$(CONFIG_PCIE_ROCKCHIP_DW_HOST) += pcie-dw-rockchip.o
[all …]
|
| D | pcie-armada8k.c | 74 static void armada8k_pcie_disable_phys(struct armada8k_pcie *pcie) in armada8k_pcie_disable_phys() argument
79 phy_power_off(pcie->phy[i]); in armada8k_pcie_disable_phys()
80 phy_exit(pcie->phy[i]); in armada8k_pcie_disable_phys()
84 static int armada8k_pcie_enable_phys(struct armada8k_pcie *pcie) in armada8k_pcie_enable_phys() argument
90 ret = phy_init(pcie->phy[i]); in armada8k_pcie_enable_phys()
94 ret = phy_set_mode_ext(pcie->phy[i], PHY_MODE_PCIE, in armada8k_pcie_enable_phys()
95 pcie->phy_count); in armada8k_pcie_enable_phys()
97 phy_exit(pcie->phy[i]); in armada8k_pcie_enable_phys()
101 ret = phy_power_on(pcie->phy[i]); in armada8k_pcie_enable_phys()
103 phy_exit(pcie->phy[i]); in armada8k_pcie_enable_phys()
[all …]
|
| D | pcie-qcom.c | 183 int (*get_resources)(struct qcom_pcie *pcie);
184 int (*init)(struct qcom_pcie *pcie);
185 int (*post_init)(struct qcom_pcie *pcie);
186 void (*deinit)(struct qcom_pcie *pcie);
187 void (*post_deinit)(struct qcom_pcie *pcie);
188 void (*ltssm_enable)(struct qcom_pcie *pcie);
189 int (*config_sid)(struct qcom_pcie *pcie);
204 static void qcom_ep_reset_assert(struct qcom_pcie *pcie) in qcom_ep_reset_assert() argument
206 gpiod_set_value_cansleep(pcie->reset, 1); in qcom_ep_reset_assert()
210 static void qcom_ep_reset_deassert(struct qcom_pcie *pcie) in qcom_ep_reset_deassert() argument
[all …]
|
| /Linux-v5.15/drivers/pci/controller/ |
| D | pci-aardvark.c | 250 static inline void advk_writel(struct advk_pcie *pcie, u32 val, u64 reg) in advk_writel() argument
252 writel(val, pcie->base + reg); in advk_writel()
255 static inline u32 advk_readl(struct advk_pcie *pcie, u64 reg) in advk_readl() argument
257 return readl(pcie->base + reg); in advk_readl()
260 static inline u16 advk_read16(struct advk_pcie *pcie, u64 reg) in advk_read16() argument
262 return advk_readl(pcie, (reg & ~0x3)) >> ((reg & 0x3) * 8); in advk_read16()
265 static int advk_pcie_link_up(struct advk_pcie *pcie) in advk_pcie_link_up() argument
269 val = advk_readl(pcie, CFG_REG); in advk_pcie_link_up()
274 static int advk_pcie_wait_for_link(struct advk_pcie *pcie) in advk_pcie_wait_for_link() argument
280 if (advk_pcie_link_up(pcie)) in advk_pcie_wait_for_link()
[all …]
|
| D | pcie-altera.c | 45 #define S10_RP_CFG_ADDR(pcie, reg) \ argument
46 (((pcie)->hip_base) + (reg) + (1 << 20))
47 #define S10_RP_SECONDARY(pcie) \ argument
48 readb(S10_RP_CFG_ADDR(pcie, PCI_SECONDARY_BUS))
60 #define TLP_CFG_DW0(pcie, cfg) \ argument
63 #define TLP_CFG_DW1(pcie, tag, be) \ argument
64 (((TLP_REQ_ID(pcie->root_bus_nr, RP_DEVFN)) << 16) | (tag << 8) | (be))
99 int (*tlp_read_pkt)(struct altera_pcie *pcie, u32 *value);
100 void (*tlp_write_pkt)(struct altera_pcie *pcie, u32 *headers,
102 bool (*get_link_status)(struct altera_pcie *pcie);
[all …]
|
| D | pcie-xilinx-nwl.c | 177 static inline u32 nwl_bridge_readl(struct nwl_pcie *pcie, u32 off) in nwl_bridge_readl() argument
179 return readl(pcie->breg_base + off); in nwl_bridge_readl()
182 static inline void nwl_bridge_writel(struct nwl_pcie *pcie, u32 val, u32 off) in nwl_bridge_writel() argument
184 writel(val, pcie->breg_base + off); in nwl_bridge_writel()
187 static bool nwl_pcie_link_up(struct nwl_pcie *pcie) in nwl_pcie_link_up() argument
189 if (readl(pcie->pcireg_base + PS_LINKUP_OFFSET) & PCIE_PHY_LINKUP_BIT) in nwl_pcie_link_up()
194 static bool nwl_phy_link_up(struct nwl_pcie *pcie) in nwl_phy_link_up() argument
196 if (readl(pcie->pcireg_base + PS_LINKUP_OFFSET) & PHY_RDY_LINKUP_BIT) in nwl_phy_link_up()
201 static int nwl_wait_for_link(struct nwl_pcie *pcie) in nwl_wait_for_link() argument
203 struct device *dev = pcie->dev; in nwl_wait_for_link()
[all …]
|
| D | pci-tegra.c | 362 struct tegra_pcie *pcie; member
375 static inline void afi_writel(struct tegra_pcie *pcie, u32 value, in afi_writel() argument
378 writel(value, pcie->afi + offset); in afi_writel()
381 static inline u32 afi_readl(struct tegra_pcie *pcie, unsigned long offset) in afi_readl() argument
383 return readl(pcie->afi + offset); in afi_readl()
386 static inline void pads_writel(struct tegra_pcie *pcie, u32 value, in pads_writel() argument
389 writel(value, pcie->pads + offset); in pads_writel()
392 static inline u32 pads_readl(struct tegra_pcie *pcie, unsigned long offset) in pads_readl() argument
394 return readl(pcie->pads + offset); in pads_readl()
429 struct tegra_pcie *pcie = bus->sysdata; in tegra_pcie_map_bus() local
[all …]
|
| D | pcie-iproc.c | 401 struct iproc_pcie *pcie = bus->sysdata; in iproc_data() local
402 return pcie; in iproc_data()
410 static inline u16 iproc_pcie_reg_offset(struct iproc_pcie *pcie, in iproc_pcie_reg_offset() argument
413 return pcie->reg_offsets[reg]; in iproc_pcie_reg_offset()
416 static inline u32 iproc_pcie_read_reg(struct iproc_pcie *pcie, in iproc_pcie_read_reg() argument
419 u16 offset = iproc_pcie_reg_offset(pcie, reg); in iproc_pcie_read_reg()
424 return readl(pcie->base + offset); in iproc_pcie_read_reg()
427 static inline void iproc_pcie_write_reg(struct iproc_pcie *pcie, in iproc_pcie_write_reg() argument
430 u16 offset = iproc_pcie_reg_offset(pcie, reg); in iproc_pcie_write_reg()
435 writel(val, pcie->base + offset); in iproc_pcie_write_reg()
[all …]
|
| D | pcie-rcar-host.c | 63 struct rcar_pcie pcie; member
75 static u32 rcar_read_conf(struct rcar_pcie *pcie, int where) in rcar_read_conf() argument
78 u32 val = rcar_pci_read_reg(pcie, where & ~3); in rcar_read_conf()
88 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_config_access() local
116 *data = rcar_pci_read_reg(pcie, PCICONF(index)); in rcar_pcie_config_access()
118 rcar_pci_write_reg(pcie, *data, PCICONF(index)); in rcar_pcie_config_access()
124 rcar_pci_write_reg(pcie, rcar_pci_read_reg(pcie, PCIEERRFR), PCIEERRFR); in rcar_pcie_config_access()
127 rcar_pci_write_reg(pcie, PCIE_CONF_BUS(bus->number) | in rcar_pcie_config_access()
132 rcar_pci_write_reg(pcie, CONFIG_SEND_ENABLE | TYPE0, PCIECCTLR); in rcar_pcie_config_access()
134 rcar_pci_write_reg(pcie, CONFIG_SEND_ENABLE | TYPE1, PCIECCTLR); in rcar_pcie_config_access()
[all …]
|
| D | pcie-brcmstb.c | 173 #define IDX_ADDR(pcie) (pcie->reg_offsets[EXT_CFG_INDEX]) argument
174 #define DATA_ADDR(pcie) (pcie->reg_offsets[EXT_CFG_DATA]) argument
175 #define PCIE_RGR1_SW_INIT_1(pcie) (pcie->reg_offsets[RGR1_SW_INIT_1]) argument
189 static inline void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 val);
190 static inline void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val);
191 static inline void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val);
192 static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val);
193 static inline void brcm_pcie_perst_set_generic(struct brcm_pcie *pcie, u32 val);
216 void (*perst_set)(struct brcm_pcie *pcie, u32 val);
217 void (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val);
[all …]
|
| D | pcie-rcar-ep.c | 26 struct rcar_pcie pcie; member
36 static void rcar_pcie_ep_hw_init(struct rcar_pcie *pcie) in rcar_pcie_ep_hw_init() argument
40 rcar_pci_write_reg(pcie, 0, PCIETCTLR); in rcar_pcie_ep_hw_init()
43 rcar_pci_write_reg(pcie, 0, PCIEMSR); in rcar_pcie_ep_hw_init()
46 rcar_rmw32(pcie, REXPCAP(0), 0xff, PCI_CAP_ID_EXP); in rcar_pcie_ep_hw_init()
47 rcar_rmw32(pcie, REXPCAP(PCI_EXP_FLAGS), in rcar_pcie_ep_hw_init()
49 rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), 0x7f, in rcar_pcie_ep_hw_init()
53 rcar_rmw32(pcie, REXPCAP(PCI_EXP_SLTCAP), PCI_EXP_SLTCAP_PSN, 0); in rcar_pcie_ep_hw_init()
55 val = rcar_pci_read_reg(pcie, EXPCAP(1)); in rcar_pcie_ep_hw_init()
58 rcar_pci_write_reg(pcie, val, EXPCAP(1)); in rcar_pcie_ep_hw_init()
[all …]
|
| D | pcie-rcar.c | 14 void rcar_pci_write_reg(struct rcar_pcie *pcie, u32 val, unsigned int reg) in rcar_pci_write_reg() argument
16 writel(val, pcie->base + reg); in rcar_pci_write_reg()
19 u32 rcar_pci_read_reg(struct rcar_pcie *pcie, unsigned int reg) in rcar_pci_read_reg() argument
21 return readl(pcie->base + reg); in rcar_pci_read_reg()
24 void rcar_rmw32(struct rcar_pcie *pcie, int where, u32 mask, u32 data) in rcar_rmw32() argument
27 u32 val = rcar_pci_read_reg(pcie, where & ~3); in rcar_rmw32()
31 rcar_pci_write_reg(pcie, val, where & ~3); in rcar_rmw32()
34 int rcar_pcie_wait_for_phyrdy(struct rcar_pcie *pcie) in rcar_pcie_wait_for_phyrdy() argument
39 if (rcar_pci_read_reg(pcie, PCIEPHYSR) & PHYRDY) in rcar_pcie_wait_for_phyrdy()
48 int rcar_pcie_wait_for_dl(struct rcar_pcie *pcie) in rcar_pcie_wait_for_dl() argument
[all …]
|
| D | pcie-iproc-platform.c | 43 struct iproc_pcie *pcie; in iproc_pcie_pltfm_probe() local
49 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); in iproc_pcie_pltfm_probe()
53 pcie = pci_host_bridge_priv(bridge); in iproc_pcie_pltfm_probe()
55 pcie->dev = dev; in iproc_pcie_pltfm_probe()
56 pcie->type = (enum iproc_pcie_type) of_device_get_match_data(dev); in iproc_pcie_pltfm_probe()
64 pcie->base = devm_pci_remap_cfgspace(dev, reg.start, in iproc_pcie_pltfm_probe()
66 if (!pcie->base) { in iproc_pcie_pltfm_probe()
70 pcie->base_addr = reg.start; in iproc_pcie_pltfm_probe()
82 pcie->ob.axi_offset = val; in iproc_pcie_pltfm_probe()
83 pcie->need_ob_cfg = true; in iproc_pcie_pltfm_probe()
[all …]
|
| /Linux-v5.15/drivers/pci/controller/mobiveil/ |
| D | pcie-mobiveil-host.c | 53 struct mobiveil_pcie *pcie = bus->sysdata; in mobiveil_pcie_map_bus() local
54 struct mobiveil_root_port *rp = &pcie->rp; in mobiveil_pcie_map_bus()
62 return pcie->csr_axi_slave_base + where; in mobiveil_pcie_map_bus()
74 mobiveil_csr_writel(pcie, value, PAB_AXI_AMAP_PEX_WIN_L(WIN_NUM_0)); in mobiveil_pcie_map_bus()
88 struct mobiveil_pcie *pcie = irq_desc_get_handler_data(desc); in mobiveil_pcie_isr() local
89 struct device *dev = &pcie->pdev->dev; in mobiveil_pcie_isr()
90 struct mobiveil_root_port *rp = &pcie->rp; in mobiveil_pcie_isr()
105 val = mobiveil_csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); in mobiveil_pcie_isr()
106 mask = mobiveil_csr_readl(pcie, PAB_INTP_AMBA_MISC_ENB); in mobiveil_pcie_isr()
111 shifted_status = mobiveil_csr_readl(pcie, in mobiveil_pcie_isr()
[all …]
|
| D | pcie-mobiveil.c | 28 static void mobiveil_pcie_sel_page(struct mobiveil_pcie *pcie, u8 pg_idx) in mobiveil_pcie_sel_page() argument
32 val = readl(pcie->csr_axi_slave_base + PAB_CTRL); in mobiveil_pcie_sel_page()
36 writel(val, pcie->csr_axi_slave_base + PAB_CTRL); in mobiveil_pcie_sel_page()
39 static void __iomem *mobiveil_pcie_comp_addr(struct mobiveil_pcie *pcie, in mobiveil_pcie_comp_addr() argument
44 mobiveil_pcie_sel_page(pcie, 0); in mobiveil_pcie_comp_addr()
45 return pcie->csr_axi_slave_base + off; in mobiveil_pcie_comp_addr()
48 mobiveil_pcie_sel_page(pcie, OFFSET_TO_PAGE_IDX(off)); in mobiveil_pcie_comp_addr()
49 return pcie->csr_axi_slave_base + OFFSET_TO_PAGE_ADDR(off); in mobiveil_pcie_comp_addr()
99 u32 mobiveil_csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size) in mobiveil_csr_read() argument
105 addr = mobiveil_pcie_comp_addr(pcie, off); in mobiveil_csr_read()
[all …]
|
| D | pcie-layerscape-gen4.c | 45 static inline u32 ls_pcie_g4_pf_readl(struct ls_pcie_g4 *pcie, u32 off) in ls_pcie_g4_pf_readl() argument
47 return ioread32(pcie->pci.csr_axi_slave_base + PCIE_PF_OFF + off); in ls_pcie_g4_pf_readl()
50 static inline void ls_pcie_g4_pf_writel(struct ls_pcie_g4 *pcie, in ls_pcie_g4_pf_writel() argument
53 iowrite32(val, pcie->pci.csr_axi_slave_base + PCIE_PF_OFF + off); in ls_pcie_g4_pf_writel()
58 struct ls_pcie_g4 *pcie = to_ls_pcie_g4(pci); in ls_pcie_g4_link_up() local
61 state = ls_pcie_g4_pf_readl(pcie, PCIE_PF_DBG); in ls_pcie_g4_link_up()
70 static void ls_pcie_g4_disable_interrupt(struct ls_pcie_g4 *pcie) in ls_pcie_g4_disable_interrupt() argument
72 struct mobiveil_pcie *mv_pci = &pcie->pci; in ls_pcie_g4_disable_interrupt()
77 static void ls_pcie_g4_enable_interrupt(struct ls_pcie_g4 *pcie) in ls_pcie_g4_enable_interrupt() argument
79 struct mobiveil_pcie *mv_pci = &pcie->pci; in ls_pcie_g4_enable_interrupt()
[all …]
|
| /Linux-v5.15/drivers/pci/controller/cadence/ |
| D | pcie-cadence.c | 10 void cdns_pcie_detect_quiet_min_delay_set(struct cdns_pcie *pcie) in cdns_pcie_detect_quiet_min_delay_set() argument
18 ltssm_control_cap = cdns_pcie_readl(pcie, CDNS_PCIE_LTSSM_CONTROL_CAP); in cdns_pcie_detect_quiet_min_delay_set()
23 cdns_pcie_writel(pcie, CDNS_PCIE_LTSSM_CONTROL_CAP, ltssm_control_cap); in cdns_pcie_detect_quiet_min_delay_set()
26 void cdns_pcie_set_outbound_region(struct cdns_pcie *pcie, u8 busnr, u8 fn, in cdns_pcie_set_outbound_region() argument
46 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR0(r), addr0); in cdns_pcie_set_outbound_region()
47 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR1(r), addr1); in cdns_pcie_set_outbound_region()
75 if (pcie->is_rc) { in cdns_pcie_set_outbound_region()
88 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC0(r), desc0); in cdns_pcie_set_outbound_region()
89 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC1(r), desc1); in cdns_pcie_set_outbound_region()
92 if (pcie->ops->cpu_addr_fixup) in cdns_pcie_set_outbound_region()
[all …]
|
| D | pcie-cadence-ep.c | 19 static u8 cdns_pcie_get_fn_from_vfn(struct cdns_pcie *pcie, u8 fn, u8 vfn) in cdns_pcie_get_fn_from_vfn() argument
27 first_vf_offset = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_SRIOV_VF_OFFSET); in cdns_pcie_get_fn_from_vfn()
28 stride = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_SRIOV_VF_STRIDE); in cdns_pcie_get_fn_from_vfn()
39 struct cdns_pcie *pcie = &ep->pcie; in cdns_pcie_ep_write_header() local
47 cdns_pcie_ep_fn_writew(pcie, fn, reg, hdr->deviceid); in cdns_pcie_ep_write_header()
51 cdns_pcie_ep_fn_writew(pcie, fn, PCI_DEVICE_ID, hdr->deviceid); in cdns_pcie_ep_write_header()
52 cdns_pcie_ep_fn_writeb(pcie, fn, PCI_REVISION_ID, hdr->revid); in cdns_pcie_ep_write_header()
53 cdns_pcie_ep_fn_writeb(pcie, fn, PCI_CLASS_PROG, hdr->progif_code); in cdns_pcie_ep_write_header()
54 cdns_pcie_ep_fn_writew(pcie, fn, PCI_CLASS_DEVICE, in cdns_pcie_ep_write_header()
56 cdns_pcie_ep_fn_writeb(pcie, fn, PCI_CACHE_LINE_SIZE, in cdns_pcie_ep_write_header()
[all …]
|
| D | pci-j721e.c | 77 static inline u32 j721e_pcie_user_readl(struct j721e_pcie *pcie, u32 offset) in j721e_pcie_user_readl() argument
79 return readl(pcie->user_cfg_base + offset); in j721e_pcie_user_readl()
82 static inline void j721e_pcie_user_writel(struct j721e_pcie *pcie, u32 offset, in j721e_pcie_user_writel() argument
85 writel(value, pcie->user_cfg_base + offset); in j721e_pcie_user_writel()
88 static inline u32 j721e_pcie_intd_readl(struct j721e_pcie *pcie, u32 offset) in j721e_pcie_intd_readl() argument
90 return readl(pcie->intd_cfg_base + offset); in j721e_pcie_intd_readl()
93 static inline void j721e_pcie_intd_writel(struct j721e_pcie *pcie, u32 offset, in j721e_pcie_intd_writel() argument
96 writel(value, pcie->intd_cfg_base + offset); in j721e_pcie_intd_writel()
101 struct j721e_pcie *pcie = priv; in j721e_pcie_link_irq_handler() local
102 struct device *dev = pcie->dev; in j721e_pcie_link_irq_handler()
[all …]
|
| D | pcie-cadence-host.c | 31 struct cdns_pcie *pcie = &rc->pcie; in cdns_pci_map_bus() local
44 return pcie->reg_base + (where & 0xfff); in cdns_pci_map_bus()
47 if (!(cdns_pcie_readl(pcie, CDNS_PCIE_LM_BASE) & 0x1)) in cdns_pci_map_bus()
50 cdns_pcie_writel(pcie, CDNS_PCIE_AT_LINKDOWN, 0x0); in cdns_pci_map_bus()
56 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR0(0), addr0); in cdns_pci_map_bus()
69 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC0(0), desc0); in cdns_pci_map_bus()
80 static int cdns_pcie_host_wait_for_link(struct cdns_pcie *pcie) in cdns_pcie_host_wait_for_link() argument
82 struct device *dev = pcie->dev; in cdns_pcie_host_wait_for_link()
87 if (cdns_pcie_link_up(pcie)) { in cdns_pcie_host_wait_for_link()
97 static int cdns_pcie_retrain(struct cdns_pcie *pcie) in cdns_pcie_retrain() argument
[all …]
|
| /Linux-v5.15/drivers/staging/mt7621-pci/ |
| D | pci-mt7621.c | 78 struct mt7621_pcie *pcie; member
102 static inline u32 pcie_read(struct mt7621_pcie *pcie, u32 reg) in pcie_read() argument
104 return readl_relaxed(pcie->base + reg); in pcie_read()
107 static inline void pcie_write(struct mt7621_pcie *pcie, u32 val, u32 reg) in pcie_write() argument
109 writel_relaxed(val, pcie->base + reg); in pcie_write()
112 static inline void pcie_rmw(struct mt7621_pcie *pcie, u32 reg, u32 clr, u32 set) in pcie_rmw() argument
114 u32 val = readl_relaxed(pcie->base + reg); in pcie_rmw()
118 writel_relaxed(val, pcie->base + reg); in pcie_rmw()
142 struct mt7621_pcie *pcie = bus->sysdata; in mt7621_pcie_map_bus() local
146 writel_relaxed(address, pcie->base + RALINK_PCI_CONFIG_ADDR); in mt7621_pcie_map_bus()
[all …]
|
