/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_dccg.c | 109 uint32_t otg_inst) in dccg2_otg_add_pixel() argument 113 REG_UPDATE_2(OTG_PIXEL_RATE_CNTL[otg_inst], in dccg2_otg_add_pixel() 114 OTG_ADD_PIXEL[otg_inst], 0, in dccg2_otg_add_pixel() 115 OTG_DROP_PIXEL[otg_inst], 0); in dccg2_otg_add_pixel() 116 REG_UPDATE(OTG_PIXEL_RATE_CNTL[otg_inst], in dccg2_otg_add_pixel() 117 OTG_ADD_PIXEL[otg_inst], 1); in dccg2_otg_add_pixel() 121 uint32_t otg_inst) in dccg2_otg_drop_pixel() argument 125 REG_UPDATE_2(OTG_PIXEL_RATE_CNTL[otg_inst], in dccg2_otg_drop_pixel() 126 OTG_ADD_PIXEL[otg_inst], 0, in dccg2_otg_drop_pixel() 127 OTG_DROP_PIXEL[otg_inst], 0); in dccg2_otg_drop_pixel() [all …]
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D | dcn20_dccg.h | 226 uint32_t otg_inst); 228 uint32_t otg_inst);
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D | dcn20_hubp.h | 341 void hubp2_vtg_sel(struct hubp *hubp, uint32_t otg_inst);
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D | dcn20_hubp.c | 1052 void hubp2_vtg_sel(struct hubp *hubp, uint32_t otg_inst) in hubp2_vtg_sel() argument 1056 REG_UPDATE(DCHUBP_CNTL, HUBP_VTG_SEL, otg_inst); in hubp2_vtg_sel()
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D | dcn20_hwseq.c | 1234 inst_flags.otg_inst = pipe->stream_res.tg->inst; in dcn20_pipe_control_lock() 1918 optc = dc->res_pool->timing_generators[dwb->otg_inst]; in dcn20_enable_writeback()
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/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn21/ |
D | dcn21_hwseq.c | 140 static bool dmub_abm_set_pipe(struct abm *abm, uint32_t otg_inst, uint32_t option, uint32_t panel_i… in dmub_abm_set_pipe() argument 149 cmd.abm_set_pipe.abm_set_pipe_data.otg_inst = otg_inst; in dmub_abm_set_pipe() 165 uint32_t otg_inst = pipe_ctx->stream_res.tg->inst; in dcn21_set_abm_immediate_disable() local 176 dmub_abm_set_pipe(abm, otg_inst, SET_ABM_PIPE_IMMEDIATELY_DISABLE, in dcn21_set_abm_immediate_disable() 185 uint32_t otg_inst = pipe_ctx->stream_res.tg->inst; in dcn21_set_pipe() local 195 dmub_abm_set_pipe(abm, otg_inst, SET_ABM_PIPE_NORMAL, panel_cntl->inst); in dcn21_set_pipe() 205 uint32_t otg_inst = pipe_ctx->stream_res.tg->inst; in dcn21_set_backlight_level() local 214 dmub_abm_set_pipe(abm, otg_inst, SET_ABM_PIPE_NORMAL, panel_cntl->inst); in dcn21_set_backlight_level()
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/Linux-v5.15/drivers/gpu/drm/amd/display/dc/inc/hw/ |
D | dccg.h | 78 uint32_t otg_inst); 80 uint32_t otg_inst);
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D | dwb.h | 176 int otg_inst; member
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D | hubp.h | 156 void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst);
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/Linux-v5.15/drivers/gpu/drm/amd/display/dc/ |
D | dm_cp_psp.h | 32 uint8_t otg_inst; member
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/Linux-v5.15/drivers/gpu/drm/amd/display/dmub/inc/ |
D | dmub_cmd.h | 525 uint32_t otg_inst: 3; member 1353 uint8_t otg_inst; member 1625 uint8_t otg_inst; member 1832 uint8_t otg_inst; member
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/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dce/ |
D | dmub_psr.c | 291 copy_settings_data->otg_inst = pipe_ctx->stream_res.tg->inst; in dmub_psr_copy_settings() 293 copy_settings_data->otg_inst = 0; in dmub_psr_copy_settings()
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/Linux-v5.15/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm_irq.c | 719 if (acrtc->otg_inst == -1) in dm_irq_state() 722 irq_source = dal_irq_type + acrtc->otg_inst; in dm_irq_state()
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D | amdgpu_dm_hdcp.c | 466 display->controller = CONTROLLER_ID_D0 + config->otg_inst; in update_config()
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D | amdgpu_dm.c | 309 int otg_inst) in get_crtc_by_otg_inst() argument 315 if (WARN_ON(otg_inst == -1)) in get_crtc_by_otg_inst() 321 if (amdgpu_crtc->otg_inst == otg_inst) in get_crtc_by_otg_inst() 1910 irq_source = IRQ_TYPE_PFLIP + acrtc->otg_inst; in dm_gpureset_toggle_interrupts() 5989 irq_source = IRQ_TYPE_VUPDATE + acrtc->otg_inst; in dm_set_vupdate_irq() 6022 irq_source = IRQ_TYPE_VBLANK + acrtc->otg_inst; in dm_set_vblank() 7371 acrtc->otg_inst = -1; in amdgpu_dm_crtc_init() 8160 acrtc->otg_inst = -1; in remove_stream() 9078 acrtc->otg_inst = status->primary_otg_inst; in amdgpu_dm_atomic_commit_tail()
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/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dml/ |
D | display_mode_structs.h | 358 unsigned char otg_inst; member
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D | display_mode_lib.c | 215 dml_print("DML PARAMS: otg_inst = %d\n", pipe_dest->otg_inst); in dml_log_pipe_params()
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D | display_mode_vba.c | 616 OTGInstPlane[mode_lib->vba.NumberOfActivePlanes] = dst->otg_inst; in fetch_pipe_params()
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/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_mode.h | 433 int otg_inst; member
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/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_hubp.c | 1276 void hubp1_vtg_sel(struct hubp *hubp, uint32_t otg_inst) in hubp1_vtg_sel() argument 1280 REG_UPDATE(DCHUBP_CNTL, HUBP_VTG_SEL, otg_inst); in hubp1_vtg_sel()
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D | dcn10_hubp.h | 765 void hubp1_vtg_sel(struct hubp *hubp, uint32_t otg_inst);
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/Linux-v5.15/drivers/gpu/drm/amd/display/dc/core/ |
D | dc_stream.c | 473 dwb->otg_inst = stream_status->primary_otg_inst; in dc_stream_add_writeback()
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D | dc_link.c | 3206 config.otg_inst = (uint8_t) pipe_ctx->stream_res.tg->inst; in update_psp_stream_config()
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/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_hwseq.c | 330 optc = dc->res_pool->timing_generators[dwb->otg_inst]; in dcn30_enable_writeback()
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/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dce110/ |
D | dce110_hw_sequencer.c | 2937 uint32_t otg_inst = pipe_ctx->stream_res.tg->inst + 1; in dce110_set_pipe() local 2940 abm->funcs->set_pipe(abm, otg_inst, panel_cntl->inst); in dce110_set_pipe()
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