Searched refs:mtk_ddp_write (Results 1 – 8 of 8) sorted by relevance
| /Linux-v5.15/drivers/gpu/drm/mediatek/ |
| D | mtk_disp_ccorr.c | 68 mtk_ddp_write(cmdq_pkt, w << 16 | h, &ccorr->cmdq_reg, ccorr->regs, in mtk_ccorr_config() 70 mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, &ccorr->cmdq_reg, ccorr->regs, in mtk_ccorr_config() 129 mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1], in mtk_ccorr_ctm_set() 131 mtk_ddp_write(cmdq_pkt, coeffs[2] << 16 | coeffs[3], in mtk_ccorr_ctm_set() 133 mtk_ddp_write(cmdq_pkt, coeffs[4] << 16 | coeffs[5], in mtk_ccorr_ctm_set() 135 mtk_ddp_write(cmdq_pkt, coeffs[6] << 16 | coeffs[7], in mtk_ccorr_ctm_set() 137 mtk_ddp_write(cmdq_pkt, coeffs[8] << 16, in mtk_ccorr_ctm_set()
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| D | mtk_drm_ddp_comp.c | 69 void mtk_ddp_write(struct cmdq_pkt *cmdq_pkt, unsigned int value, in mtk_ddp_write() function 137 mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_5); in mtk_dither_set_common() 138 mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_7); in mtk_dither_set_common() 139 mtk_ddp_write(cmdq_pkt, in mtk_dither_set_common() 144 mtk_ddp_write(cmdq_pkt, in mtk_dither_set_common() 150 mtk_ddp_write(cmdq_pkt, dither_en, cmdq_reg, regs, cfg); in mtk_dither_set_common() 169 mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs, DISP_OD_SIZE); in mtk_od_config() 170 mtk_ddp_write(cmdq_pkt, OD_RELAYMODE, &priv->cmdq_reg, priv->regs, DISP_OD_CFG); in mtk_od_config() 194 mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_DITHER_SIZE); in mtk_dither_config() 195 mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, &priv->cmdq_reg, priv->regs, DISP_DITHER_CFG); in mtk_dither_config()
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| D | mtk_disp_ovl.c | 174 mtk_ddp_write(cmdq_pkt, 0x1, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST); in mtk_ovl_config() 175 mtk_ddp_write(cmdq_pkt, 0x0, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST); in mtk_ovl_config() 227 mtk_ddp_write(cmdq_pkt, 0x1, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_on() 238 mtk_ddp_write(cmdq_pkt, gmc_value, in mtk_ovl_layer_on() 251 mtk_ddp_write(cmdq_pkt, 0, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_off()
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| D | mtk_disp_aal.c | 60 mtk_ddp_write(cmdq_pkt, w << 16 | h, &aal->cmdq_reg, aal->regs, DISP_AAL_SIZE); in mtk_aal_config() 61 mtk_ddp_write(cmdq_pkt, w << 16 | h, &aal->cmdq_reg, aal->regs, DISP_AAL_OUTPUT_SIZE); in mtk_aal_config()
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| D | mtk_disp_color.c | 66 mtk_ddp_write(cmdq_pkt, w, &color->cmdq_reg, color->regs, DISP_COLOR_WIDTH(color)); in mtk_color_config() 67 mtk_ddp_write(cmdq_pkt, h, &color->cmdq_reg, color->regs, DISP_COLOR_HEIGHT(color)); in mtk_color_config()
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| D | mtk_disp_rdma.c | 172 mtk_ddp_write(cmdq_pkt, reg, &rdma->cmdq_reg, rdma->regs, DISP_REG_RDMA_FIFO_CON); in mtk_rdma_config() 247 mtk_ddp_write(cmdq_pkt, RDMA_MEM_GMC, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
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| D | mtk_disp_gamma.c | 91 mtk_ddp_write(cmdq_pkt, h << 16 | w, &gamma->cmdq_reg, gamma->regs, in mtk_gamma_config()
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| D | mtk_drm_ddp_comp.h | 195 void mtk_ddp_write(struct cmdq_pkt *cmdq_pkt, unsigned int value,
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