| /Linux-v5.15/drivers/gpu/drm/msm/ |
| D | msm_gpu.h | 45 int (*get_param)(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
46 int (*hw_init)(struct msm_gpu *gpu);
47 int (*pm_suspend)(struct msm_gpu *gpu);
48 int (*pm_resume)(struct msm_gpu *gpu);
49 void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit);
50 void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
51 irqreturn_t (*irq)(struct msm_gpu *irq);
52 struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu);
53 void (*recover)(struct msm_gpu *gpu);
54 void (*destroy)(struct msm_gpu *gpu);
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| D | msm_gpu.c | 23 static int enable_pwrrail(struct msm_gpu *gpu) in enable_pwrrail()
47 static int disable_pwrrail(struct msm_gpu *gpu) in disable_pwrrail()
56 static int enable_clk(struct msm_gpu *gpu) in enable_clk()
68 static int disable_clk(struct msm_gpu *gpu) in disable_clk()
86 static int enable_axi(struct msm_gpu *gpu) in enable_axi()
91 static int disable_axi(struct msm_gpu *gpu) in disable_axi()
97 int msm_gpu_pm_resume(struct msm_gpu *gpu) in msm_gpu_pm_resume()
123 int msm_gpu_pm_suspend(struct msm_gpu *gpu) in msm_gpu_pm_suspend()
149 int msm_gpu_hw_init(struct msm_gpu *gpu) in msm_gpu_hw_init()
167 static void update_fences(struct msm_gpu *gpu, struct msm_ringbuffer *ring, in update_fences()
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| D | msm_gpu_devfreq.c | 20 struct msm_gpu *gpu = dev_to_gpu(dev); in msm_devfreq_target()
49 static unsigned long get_freq(struct msm_gpu *gpu) in get_freq()
63 struct msm_gpu *gpu = dev_to_gpu(dev); in msm_devfreq_get_dev_status()
91 void msm_devfreq_init(struct msm_gpu *gpu) in msm_devfreq_init()
129 void msm_devfreq_cleanup(struct msm_gpu *gpu) in msm_devfreq_cleanup()
134 void msm_devfreq_resume(struct msm_gpu *gpu) in msm_devfreq_resume()
142 void msm_devfreq_suspend(struct msm_gpu *gpu) in msm_devfreq_suspend()
147 void msm_devfreq_active(struct msm_gpu *gpu) in msm_devfreq_active()
187 void msm_devfreq_idle(struct msm_gpu *gpu) in msm_devfreq_idle()
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| D | msm_ringbuffer.h | 39 struct msm_gpu *gpu;
75 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
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| D | msm_debugfs.c | 29 struct msm_gpu *gpu = priv->gpu; in msm_gpu_show()
49 struct msm_gpu *gpu = priv->gpu; in msm_gpu_release()
64 struct msm_gpu *gpu = priv->gpu; in msm_gpu_open()
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| D | msm_gpummu.c | 13 struct msm_gpu *gpu;
93 struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu) in msm_gpummu_new()
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| D | msm_ringbuffer.c | 28 struct msm_gpu *gpu = submit->gpu; in msm_job_run()
60 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id, in msm_ringbuffer_new()
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| D | msm_perf.c | 61 struct msm_gpu *gpu = priv->gpu; in refill_buf()
155 struct msm_gpu *gpu = priv->gpu; in perf_open()
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| D | msm_mmu.h | 44 struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu);
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| D | msm_gem.h | 137 void msm_gem_active_get(struct drm_gem_object *obj, struct msm_gpu *gpu);
306 struct msm_gpu *gpu;
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| /Linux-v5.15/drivers/gpu/drm/msm/adreno/ |
| D | a5xx_gpu.h | 52 void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor);
135 int a5xx_power_init(struct msm_gpu *gpu);
136 void a5xx_gpmu_ucode_init(struct msm_gpu *gpu);
138 static inline int spin_usecs(struct msm_gpu *gpu, uint32_t usecs, in spin_usecs()
154 bool a5xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
155 void a5xx_set_hwcg(struct msm_gpu *gpu, bool state);
157 void a5xx_preempt_init(struct msm_gpu *gpu);
158 void a5xx_preempt_hw_init(struct msm_gpu *gpu);
159 void a5xx_preempt_trigger(struct msm_gpu *gpu);
160 void a5xx_preempt_irq(struct msm_gpu *gpu);
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| D | adreno_gpu.h | 52 int (*get_timestamp)(struct msm_gpu *gpu, uint64_t *value);
69 struct msm_gpu *(*init)(struct drm_device *dev);
78 struct msm_gpu base;
277 int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
280 struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu,
282 int adreno_hw_init(struct msm_gpu *gpu);
283 void adreno_recover(struct msm_gpu *gpu);
284 void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring, u32 reg);
285 bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
287 void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state,
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| D | a2xx_gpu.c | 10 static void a2xx_dump(struct msm_gpu *gpu);
11 static bool a2xx_idle(struct msm_gpu *gpu);
13 static void a2xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a2xx_submit()
55 static bool a2xx_me_init(struct msm_gpu *gpu) in a2xx_me_init()
102 static int a2xx_hw_init(struct msm_gpu *gpu) in a2xx_hw_init()
248 static void a2xx_recover(struct msm_gpu *gpu) in a2xx_recover()
269 static void a2xx_destroy(struct msm_gpu *gpu) in a2xx_destroy()
281 static bool a2xx_idle(struct msm_gpu *gpu) in a2xx_idle()
299 static irqreturn_t a2xx_irq(struct msm_gpu *gpu) in a2xx_irq()
430 static void a2xx_dump(struct msm_gpu *gpu) in a2xx_dump()
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| D | a4xx_gpu.c | 22 static void a4xx_dump(struct msm_gpu *gpu);
23 static bool a4xx_idle(struct msm_gpu *gpu);
25 static void a4xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a4xx_submit()
77 static void a4xx_enable_hwcg(struct msm_gpu *gpu) in a4xx_enable_hwcg()
157 static bool a4xx_me_init(struct msm_gpu *gpu) in a4xx_me_init()
184 static int a4xx_hw_init(struct msm_gpu *gpu) in a4xx_hw_init()
351 static void a4xx_recover(struct msm_gpu *gpu) in a4xx_recover()
372 static void a4xx_destroy(struct msm_gpu *gpu) in a4xx_destroy()
386 static bool a4xx_idle(struct msm_gpu *gpu) in a4xx_idle()
403 static irqreturn_t a4xx_irq(struct msm_gpu *gpu) in a4xx_irq()
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| D | a5xx_debugfs.c | 14 static void pfp_print(struct msm_gpu *gpu, struct drm_printer *p) in pfp_print()
27 static void me_print(struct msm_gpu *gpu, struct drm_printer *p) in me_print()
40 static void meq_print(struct msm_gpu *gpu, struct drm_printer *p) in meq_print()
53 static void roq_print(struct msm_gpu *gpu, struct drm_printer *p) in roq_print()
76 void (*show)(struct msm_gpu *gpu, struct drm_printer *p) = in show()
97 struct msm_gpu *gpu = priv->gpu; in reset_set()
144 void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor) in a5xx_debugfs_init()
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| D | a5xx_gpu.c | 17 static void a5xx_dump(struct msm_gpu *gpu);
21 static void update_shadow_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_shadow_rptr()
33 void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring, in a5xx_flush()
66 static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a5xx_submit_in_rb()
125 static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a5xx_submit()
438 void a5xx_set_hwcg(struct msm_gpu *gpu, bool state) in a5xx_set_hwcg()
468 static int a5xx_me_init(struct msm_gpu *gpu) in a5xx_me_init()
509 static int a5xx_preempt_start(struct msm_gpu *gpu) in a5xx_preempt_start()
572 static int a5xx_ucode_init(struct msm_gpu *gpu) in a5xx_ucode_init()
621 static int a5xx_zap_shader_resume(struct msm_gpu *gpu) in a5xx_zap_shader_resume()
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| D | a5xx_preempt.c | 40 static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_wptr()
56 static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) in get_next_ring()
79 struct msm_gpu *gpu = &a5xx_gpu->base.base; in a5xx_preempt_timer()
90 void a5xx_preempt_trigger(struct msm_gpu *gpu) in a5xx_preempt_trigger()
158 void a5xx_preempt_irq(struct msm_gpu *gpu) in a5xx_preempt_irq()
194 void a5xx_preempt_hw_init(struct msm_gpu *gpu) in a5xx_preempt_hw_init()
225 struct msm_gpu *gpu = &adreno_gpu->base; in preempt_init_ring()
268 void a5xx_preempt_fini(struct msm_gpu *gpu) in a5xx_preempt_fini()
280 void a5xx_preempt_init(struct msm_gpu *gpu) in a5xx_preempt_init()
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| D | a3xx_gpu.c | 28 static void a3xx_dump(struct msm_gpu *gpu);
29 static bool a3xx_idle(struct msm_gpu *gpu);
31 static void a3xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a3xx_submit()
86 static bool a3xx_me_init(struct msm_gpu *gpu) in a3xx_me_init()
113 static int a3xx_hw_init(struct msm_gpu *gpu) in a3xx_hw_init()
352 static void a3xx_recover(struct msm_gpu *gpu) in a3xx_recover()
373 static void a3xx_destroy(struct msm_gpu *gpu) in a3xx_destroy()
387 static bool a3xx_idle(struct msm_gpu *gpu) in a3xx_idle()
405 static irqreturn_t a3xx_irq(struct msm_gpu *gpu) in a3xx_irq()
460 static void a3xx_dump(struct msm_gpu *gpu) in a3xx_dump()
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| D | a6xx_gpu.c | 18 static inline bool _a6xx_check_idle(struct msm_gpu *gpu) in _a6xx_check_idle()
36 static bool a6xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_idle()
55 static void update_shadow_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_shadow_rptr()
68 static void a6xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_flush()
145 static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a6xx_submit()
498 static void a6xx_set_hwcg(struct msm_gpu *gpu, bool state) in a6xx_set_hwcg()
657 static void a6xx_set_cp_protect(struct msm_gpu *gpu) in a6xx_set_cp_protect()
689 static void a6xx_set_ubwc_config(struct msm_gpu *gpu) in a6xx_set_ubwc_config()
727 static int a6xx_cp_init(struct msm_gpu *gpu) in a6xx_cp_init()
764 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_ucode_check_version()
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| D | a6xx_gpu.h | 90 void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp);
91 unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu);
93 void a6xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state,
96 struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu);
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| D | a5xx_power.c | 103 static inline uint32_t _get_mvolts(struct msm_gpu *gpu, uint32_t freq) in _get_mvolts()
122 static void a530_lm_setup(struct msm_gpu *gpu) in a530_lm_setup()
175 static void a540_lm_setup(struct msm_gpu *gpu) in a540_lm_setup()
211 static void a5xx_pc_init(struct msm_gpu *gpu) in a5xx_pc_init()
220 static int a5xx_gpmu_init(struct msm_gpu *gpu) in a5xx_gpmu_init()
278 static void a5xx_lm_enable(struct msm_gpu *gpu) in a5xx_lm_enable()
295 int a5xx_power_init(struct msm_gpu *gpu) in a5xx_power_init()
324 void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) in a5xx_gpmu_ucode_init()
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| D | adreno_gpu.c | 25 static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname, in zap_shader_load_mdt()
171 int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid) in adreno_zap_shader_load()
195 adreno_iommu_create_address_space(struct msm_gpu *gpu, in adreno_iommu_create_address_space()
230 int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value) in adreno_get_param()
387 struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu, in adreno_fw_create_bo()
406 int adreno_hw_init(struct msm_gpu *gpu) in adreno_hw_init()
438 struct msm_gpu *gpu = &adreno_gpu->base; in get_rptr()
443 struct msm_ringbuffer *adreno_active_ring(struct msm_gpu *gpu) in adreno_active_ring()
448 void adreno_recover(struct msm_gpu *gpu) in adreno_recover()
466 void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring, u32 reg) in adreno_flush()
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| D | a6xx_gpu_state.c | 112 static int a6xx_crashdumper_init(struct msm_gpu *gpu, in a6xx_crashdumper_init()
125 static int a6xx_crashdumper_run(struct msm_gpu *gpu, in a6xx_crashdumper_run()
156 static int debugbus_read(struct msm_gpu *gpu, u32 block, u32 offset, in debugbus_read()
204 static int vbif_debugbus_read(struct msm_gpu *gpu, u32 ctrl0, u32 ctrl1, in vbif_debugbus_read()
228 static void a6xx_get_vbif_debugbus_block(struct msm_gpu *gpu, in a6xx_get_vbif_debugbus_block()
282 static void a6xx_get_debugbus_block(struct msm_gpu *gpu, in a6xx_get_debugbus_block()
318 static void a6xx_get_debugbus(struct msm_gpu *gpu, in a6xx_get_debugbus()
446 static void a6xx_get_dbgahb_cluster(struct msm_gpu *gpu, in a6xx_get_dbgahb_cluster()
492 static void a6xx_get_dbgahb_clusters(struct msm_gpu *gpu, in a6xx_get_dbgahb_clusters()
514 static void a6xx_get_cluster(struct msm_gpu *gpu, in a6xx_get_cluster()
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| D | adreno_device.c | 373 struct msm_gpu *adreno_load_gpu(struct drm_device *dev) in adreno_load_gpu()
377 struct msm_gpu *gpu = NULL; in adreno_load_gpu()
487 struct msm_gpu *gpu; in adreno_bind()
524 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_unbind()
594 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_resume()
601 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_suspend()
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| D | a6xx_gmu.c | 21 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_fault()
105 void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp) in a6xx_gmu_set_freq()
165 unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu) in a6xx_gmu_get_freq()
888 static void a6xx_gmu_set_initial_freq(struct msm_gpu *gpu, struct a6xx_gmu *gmu) in a6xx_gmu_set_initial_freq()
902 static void a6xx_gmu_set_initial_bw(struct msm_gpu *gpu, struct a6xx_gmu *gmu) in a6xx_gmu_set_initial_bw()
918 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_resume()
1018 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_bus_clear_pending_transactions()
1103 struct msm_gpu *gpu = &a6xx_gpu->base.base; in a6xx_gmu_stop()
1309 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_rpmh_votes_init()
1359 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_pwrlevels_probe()
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